Lines Matching refs:tmp2
412 TCGv_i32 tmp2 = tcg_temp_new_i32(); in gen_smul_dual() local
414 tcg_gen_ext16s_i32(tmp2, b); in gen_smul_dual()
415 tcg_gen_mul_i32(tmp1, tmp1, tmp2); in gen_smul_dual()
1479 TCGv_i32 tmp, tmp2, tmp3; in disas_iwmmxt_insn() local
1588 tmp2 = load_reg(s, rd); in disas_iwmmxt_insn()
1589 tcg_gen_andc_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
1814 tmp2 = tcg_constant_i32(0xff); in disas_iwmmxt_insn()
1818 tmp2 = tcg_constant_i32(0xffff); in disas_iwmmxt_insn()
1822 tmp2 = tcg_constant_i32(0xffffffff); in disas_iwmmxt_insn()
1828 gen_helper_iwmmxt_insr(cpu_M0, cpu_M0, tmp, tmp2, tmp3); in disas_iwmmxt_insn()
1907 tmp2 = tcg_temp_new_i32(); in disas_iwmmxt_insn()
1908 tcg_gen_mov_i32(tmp2, tmp); in disas_iwmmxt_insn()
1912 tcg_gen_shli_i32(tmp2, tmp2, 4); in disas_iwmmxt_insn()
1913 tcg_gen_and_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
1918 tcg_gen_shli_i32(tmp2, tmp2, 8); in disas_iwmmxt_insn()
1919 tcg_gen_and_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
1923 tcg_gen_shli_i32(tmp2, tmp2, 16); in disas_iwmmxt_insn()
1924 tcg_gen_and_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
1953 tmp2 = tcg_temp_new_i32(); in disas_iwmmxt_insn()
1954 tcg_gen_mov_i32(tmp2, tmp); in disas_iwmmxt_insn()
1958 tcg_gen_shli_i32(tmp2, tmp2, 4); in disas_iwmmxt_insn()
1959 tcg_gen_or_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
1964 tcg_gen_shli_i32(tmp2, tmp2, 8); in disas_iwmmxt_insn()
1965 tcg_gen_or_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
1969 tcg_gen_shli_i32(tmp2, tmp2, 16); in disas_iwmmxt_insn()
1970 tcg_gen_or_i32(tmp, tmp, tmp2); in disas_iwmmxt_insn()
2417 tmp2 = load_reg(s, rd1); in disas_iwmmxt_insn()
2420 gen_helper_iwmmxt_muladdsl(cpu_M0, cpu_M0, tmp, tmp2); in disas_iwmmxt_insn()
2423 gen_helper_iwmmxt_muladdsw(cpu_M0, cpu_M0, tmp, tmp2); in disas_iwmmxt_insn()
2429 tcg_gen_shri_i32(tmp2, tmp2, 16); in disas_iwmmxt_insn()
2430 gen_helper_iwmmxt_muladdswl(cpu_M0, cpu_M0, tmp, tmp2); in disas_iwmmxt_insn()
2450 TCGv_i32 tmp, tmp2; in disas_dsp_insn() local
2462 tmp2 = load_reg(s, rd1); in disas_dsp_insn()
2465 gen_helper_iwmmxt_muladdsl(cpu_M0, cpu_M0, tmp, tmp2); in disas_dsp_insn()
2468 gen_helper_iwmmxt_muladdsw(cpu_M0, cpu_M0, tmp, tmp2); in disas_dsp_insn()
2477 tcg_gen_shri_i32(tmp2, tmp2, 16); in disas_dsp_insn()
2478 gen_helper_iwmmxt_muladdswl(cpu_M0, cpu_M0, tmp, tmp2); in disas_dsp_insn()
3262 TCGv_i32 tmp2 = tcg_temp_new_i32(); in gen_load_exclusive() local
3278 tcg_gen_extr_i64_i32(tmp2, tmp, t64); in gen_load_exclusive()
3280 tcg_gen_extr_i64_i32(tmp, tmp2, t64); in gen_load_exclusive()
3282 store_reg(s, rt2, tmp2); in gen_load_exclusive()
3699 TCGv_i32 tmp1, tmp2; in op_s_rrr_shi() local
3701 tmp2 = load_reg(s, a->rm); in op_s_rrr_shi()
3702 gen_arm_shift_im(tmp2, a->shty, a->shim, logic_cc); in op_s_rrr_shi()
3705 gen(tmp1, tmp1, tmp2); in op_s_rrr_shi()
3739 TCGv_i32 tmp1, tmp2; in op_s_rrr_shr() local
3742 tmp2 = load_reg(s, a->rm); in op_s_rrr_shr()
3743 gen_arm_shift_reg(tmp2, a->shty, tmp1, logic_cc); in op_s_rrr_shr()
3746 gen(tmp1, tmp1, tmp2); in op_s_rrr_shr()
3758 TCGv_i32 tmp1, tmp2; in op_s_rxr_shr() local
3761 tmp2 = load_reg(s, a->rm); in op_s_rxr_shr()
3762 gen_arm_shift_reg(tmp2, a->shty, tmp1, logic_cc); in op_s_rxr_shr()
3764 gen(tmp2, tmp2); in op_s_rxr_shr()
3766 gen_logic_CC(tmp2); in op_s_rxr_shr()
3768 return store_reg_kind(s, a->rd, tmp2, kind); in op_s_rxr_shr()
5023 TCGv_i32 tmp2 = tcg_temp_new_i32(); in do_ldrd_load() local
5027 tcg_gen_extr_i64_i32(tmp2, tmp, t64); in do_ldrd_load()
5029 tcg_gen_extr_i64_i32(tmp, tmp2, t64); in do_ldrd_load()
5032 store_reg(s, rt2, tmp2); in do_ldrd_load()
5933 TCGv_i32 tmp2 = load_reg(s, a->rn); in op_xta() local
5934 gen_add(tmp, tmp, tmp2); in op_xta()