Lines Matching refs:sfpa
107 TCGv_i32 aspen, sfpa; in trans_VSCCLRM() local
134 sfpa = load_cpu_field(v7m.control[M_REG_S]); in trans_VSCCLRM()
137 tcg_gen_andi_i32(sfpa, sfpa, R_V7M_CONTROL_SFPA_MASK); in trans_VSCCLRM()
138 tcg_gen_or_i32(sfpa, sfpa, aspen); in trans_VSCCLRM()
140 tcg_gen_brcondi_i32(TCG_COND_EQ, sfpa, 0, s->condlabel.label); in trans_VSCCLRM()
381 TCGv_i32 sfpa, control; in gen_M_fp_sysreg_write() local
387 sfpa = tcg_temp_new_i32(); in gen_M_fp_sysreg_write()
388 tcg_gen_shri_i32(sfpa, tmp, 31); in gen_M_fp_sysreg_write()
390 tcg_gen_deposit_i32(control, control, sfpa, in gen_M_fp_sysreg_write()
474 TCGv_i32 control, sfpa, fpscr; in gen_M_fp_sysreg_read() local
477 sfpa = tcg_temp_new_i32(); in gen_M_fp_sysreg_read()
481 tcg_gen_andi_i32(sfpa, control, R_V7M_CONTROL_SFPA_MASK); in gen_M_fp_sysreg_read()
482 tcg_gen_shli_i32(sfpa, sfpa, 31 - R_V7M_CONTROL_SFPA_SHIFT); in gen_M_fp_sysreg_read()
483 tcg_gen_or_i32(tmp, tmp, sfpa); in gen_M_fp_sysreg_read()
502 TCGv_i32 control, sfpa, fpscr, fpdscr; in gen_M_fp_sysreg_read() local
529 sfpa = tcg_temp_new_i32(); in gen_M_fp_sysreg_read()
534 tcg_gen_andi_i32(sfpa, control, R_V7M_CONTROL_SFPA_MASK); in gen_M_fp_sysreg_read()
535 tcg_gen_shli_i32(sfpa, sfpa, 31 - R_V7M_CONTROL_SFPA_SHIFT); in gen_M_fp_sysreg_read()
536 tcg_gen_or_i32(tmp, tmp, sfpa); in gen_M_fp_sysreg_read()
541 tcg_gen_movcond_i32(TCG_COND_EQ, fpscr, sfpa, tcg_constant_i32(0), in gen_M_fp_sysreg_read()