Lines Matching refs:fpscr
330 TCGv_i32 fpscr; in gen_M_fp_sysreg_write() local
344 fpscr = load_cpu_field_low32(vfp.fpsr); in gen_M_fp_sysreg_write()
345 tcg_gen_andi_i32(fpscr, fpscr, ~FPSR_NZCV_MASK); in gen_M_fp_sysreg_write()
346 tcg_gen_or_i32(fpscr, fpscr, tmp); in gen_M_fp_sysreg_write()
347 store_cpu_field_low32(fpscr, vfp.fpsr); in gen_M_fp_sysreg_write()
474 TCGv_i32 control, sfpa, fpscr; in gen_M_fp_sysreg_read() local
495 fpscr = load_cpu_field(v7m.fpdscr[M_REG_NS]); in gen_M_fp_sysreg_read()
496 gen_helper_vfp_set_fpscr(tcg_env, fpscr); in gen_M_fp_sysreg_read()
502 TCGv_i32 control, sfpa, fpscr, fpdscr; in gen_M_fp_sysreg_read() local
530 fpscr = tcg_temp_new_i32(); in gen_M_fp_sysreg_read()
531 gen_helper_vfp_get_fpscr(fpscr, tcg_env); in gen_M_fp_sysreg_read()
532 tcg_gen_andi_i32(tmp, fpscr, ~FPSR_NZCV_MASK); in gen_M_fp_sysreg_read()
541 tcg_gen_movcond_i32(TCG_COND_EQ, fpscr, sfpa, tcg_constant_i32(0), in gen_M_fp_sysreg_read()
542 fpdscr, fpscr); in gen_M_fp_sysreg_read()
543 gen_helper_vfp_set_fpscr(tcg_env, fpscr); in gen_M_fp_sysreg_read()