28                                             ARMMMUFaultInfo *fi,  in merge_syn_data_abort()  argument
59         assert(!fi->stage2);  in merge_syn_data_abort()
60         syn = syn_data_abort_vncr(fi->ea, is_write, fsc);  in merge_syn_data_abort()
62         || fi->s1ptw || !fi->stage2) {  in merge_syn_data_abort()
64                                     fi->ea, 0, fi->s1ptw, is_write, fsc);  in merge_syn_data_abort()
73                                       fi->ea, 0, fi->s1ptw, is_write, fsc,  in merge_syn_data_abort()
81 static uint32_t compute_fsr_fsc(CPUARMState *env, ARMMMUFaultInfo *fi,  in compute_fsr_fsc()  argument
102         fsr = arm_fi_to_lfsc(fi);  in compute_fsr_fsc()
105         fsr = arm_fi_to_sfsc(fi);  in compute_fsr_fsc()
120                                     ARMMMUFaultInfo *fi)  in report_as_gpc_exception()  argument
124     switch (fi->gpcf) {  in report_as_gpc_exception()
146     assert(fi->type == ARMFault_GPCFOnWalk ||  in report_as_gpc_exception()
147            fi->type == ARMFault_GPCFOnOutput);  in report_as_gpc_exception()
148     if (fi->gpcf == GPCF_AddressSize) {  in report_as_gpc_exception()
149         assert(fi->level == 0);  in report_as_gpc_exception()
151         assert(fi->level >= 0 && fi->level <= 1);  in report_as_gpc_exception()
157 static unsigned encode_gpcsc(ARMMMUFaultInfo *fi)  in encode_gpcsc()  argument
167     return gpcsc[fi->gpcf] | fi->level;  in encode_gpcsc()
173                        int mmu_idx, ARMMMUFaultInfo *fi)  in arm_deliver_fault()  argument
195     if (report_as_gpc_exception(cpu, current_el, fi)) {  in arm_deliver_fault()
198         fsr = compute_fsr_fsc(env, fi, target_el, mmu_idx, &fsc);  in arm_deliver_fault()
200         syn = syn_gpc(fi->stage2 && fi->type == ARMFault_GPCFOnWalk,  in arm_deliver_fault()
202                       encode_gpcsc(fi), is_vncr,  in arm_deliver_fault()
203                       0, fi->s1ptw,  in arm_deliver_fault()
206         env->cp15.mfar_el3 = fi->paddr;  in arm_deliver_fault()
207         switch (fi->paddr_space) {  in arm_deliver_fault()
228     if (fi->gpcf == GPCF_Fail && target_el < 2) {  in arm_deliver_fault()
234     if (fi->stage2) {  in arm_deliver_fault()
236         env->cp15.hpfar_el2 = extract64(fi->s2addr, 12, 47) << 4;  in arm_deliver_fault()
237         if (arm_is_secure_below_el3(env) && fi->s1ns) {  in arm_deliver_fault()
243     fsr = compute_fsr_fsc(env, fi, target_el, mmu_idx, &fsc);  in arm_deliver_fault()
246         syn = syn_insn_abort(same_el, fi->ea, fi->s1ptw, fsc);  in arm_deliver_fault()
249         syn = merge_syn_data_abort(env->exception.syndrome, fi, target_el,  in arm_deliver_fault()
271     ARMMMUFaultInfo fi = {};  in arm_cpu_do_unaligned_access()  local
276     fi.type = ARMFault_Alignment;  in arm_cpu_do_unaligned_access()
277     arm_deliver_fault(cpu, vaddr, access_type, mmu_idx, &fi);  in arm_cpu_do_unaligned_access()
282     ARMMMUFaultInfo fi = { .type = ARMFault_Alignment };  in helper_exception_pc_alignment()  local
293     env->exception.fsr = compute_fsr_fsc(env, &fi, target_el, mmu_idx, &fsc);  in helper_exception_pc_alignment()
311     ARMMMUFaultInfo fi = {};  in arm_cpu_do_transaction_failed()  local
316     fi.ea = arm_extabort_type(response);  in arm_cpu_do_transaction_failed()
317     fi.type = ARMFault_SyncExternal;  in arm_cpu_do_transaction_failed()
318     arm_deliver_fault(cpu, addr, access_type, mmu_idx, &fi);  in arm_cpu_do_transaction_failed()
327     ARMMMUFaultInfo local_fi, *fi;  in arm_cpu_tlb_fill_align()  local
333     fi = cpu->env.tlb_fi;  in arm_cpu_tlb_fill_align()
334     if (fi) {  in arm_cpu_tlb_fill_align()
337         fi = memset(&local_fi, 0, sizeof(local_fi));  in arm_cpu_tlb_fill_align()
346         fi->type = ARMFault_Alignment;  in arm_cpu_tlb_fill_align()
349                               &res, fi)) {  in arm_cpu_tlb_fill_align()
361     arm_deliver_fault(cpu, address, access_type, mmu_idx, fi);  in arm_cpu_tlb_fill_align()
368     ARMMMUFaultInfo fi = {  in arm_cpu_record_sigsegv()  local
379     arm_deliver_fault(cpu, addr, access_type, MMU_USER_IDX, &fi);  in arm_cpu_record_sigsegv()