Lines Matching +full:qemu +full:- +full:kvm
2 * ARM implementation of KVM hooks
4 * Copyright Christoffer Dall 2009-2010
5 * Copyright Mian-M. Hamayun 2013, Virtual Open Systems
9 * See the COPYING file in the top-level directory.
13 #include "qemu/osdep.h"
16 #include <linux/kvm.h>
18 #include "qemu/timer.h"
19 #include "qemu/error-report.h"
20 #include "qemu/main-loop.h"
25 #include "system/kvm.h"
29 #include "cpu-sysregs.h"
34 #include "system/address-spaces.h"
39 #include "qemu/log.h"
81 init.target = cpu->kvm_target; in kvm_arm_vcpu_init()
82 memcpy(init.features, cpu->kvm_init_features, sizeof(init.features)); in kvm_arm_vcpu_init()
95 * KVM's API documentation.
107 int ret = 0, kvmfd = -1, vmfd = -1, cpufd = -1; in kvm_arm_create_scratch_host_vcpu()
110 kvmfd = qemu_open_old("/dev/kvm", O_RDWR); in kvm_arm_create_scratch_host_vcpu()
120 } while (vmfd == -1 && errno == EINTR); in kvm_arm_create_scratch_host_vcpu()
149 if (init->target == -1) { in kvm_arm_create_scratch_host_vcpu()
156 init->target = preferred.target; in kvm_arm_create_scratch_host_vcpu()
188 for (i = 2; i >= 0; i--) { in kvm_arm_destroy_scratch_host_vcpu()
202 return -1; in read_sys_reg32()
238 reg = &ahcf->isar.idregs[index]; in get_host_cpu_reg()
258 * target = -1 informs kvm_arm_create_scratch_host_vcpu() in kvm_arm_get_host_cpu_features()
261 struct kvm_vcpu_init init = { .target = -1, }; in kvm_arm_get_host_cpu_features()
291 ahcf->target = init.target; in kvm_arm_get_host_cpu_features()
292 ahcf->dtb_compatible = "arm,armv8"; in kvm_arm_get_host_cpu_features()
303 * However, it could cause problems down the line for QEMU, in kvm_arm_get_host_cpu_features()
308 * run the tiniest of hand-crafted kernels to extract in kvm_arm_get_host_cpu_features()
313 SET_IDREG(&ahcf->isar, ID_AA64PFR0, 0x00000011); /* EL1&0, AArch64 only */ in kvm_arm_get_host_cpu_features()
351 err |= read_sys_reg32(fd, &ahcf->isar.mvfr0, in kvm_arm_get_host_cpu_features()
353 err |= read_sys_reg32(fd, &ahcf->isar.mvfr1, in kvm_arm_get_host_cpu_features()
355 err |= read_sys_reg32(fd, &ahcf->isar.mvfr2, in kvm_arm_get_host_cpu_features()
363 * provide an accessor for it in 64-bit mode, which is what this in kvm_arm_get_host_cpu_features()
364 * scratch VM is in, and there's no architected "64-bit sysreg in kvm_arm_get_host_cpu_features()
365 * which reads the same as the 32-bit register" the way there is in kvm_arm_get_host_cpu_features()
368 * arch/arm64/kvm/sys_regs.c:trap_dbgidr() does. in kvm_arm_get_host_cpu_features()
371 if (FIELD_EX32_IDREG(&ahcf->isar, ID_AA64PFR0, EL1) >= 2) { in kvm_arm_get_host_cpu_features()
372 int wrps = FIELD_EX64_IDREG(&ahcf->isar, ID_AA64DFR0, WRPS); in kvm_arm_get_host_cpu_features()
373 int brps = FIELD_EX64_IDREG(&ahcf->isar, ID_AA64DFR0, BRPS); in kvm_arm_get_host_cpu_features()
375 FIELD_EX64_IDREG(&ahcf->isar, ID_AA64DFR0, CTX_CMPS); in kvm_arm_get_host_cpu_features()
378 !!FIELD_EX32_IDREG(&ahcf->isar, ID_AA64PFR0, EL3); in kvm_arm_get_host_cpu_features()
388 ahcf->isar.dbgdidr = dbgdidr; in kvm_arm_get_host_cpu_features()
393 err |= read_sys_reg64(fd, &ahcf->isar.reset_pmcr_el0, in kvm_arm_get_host_cpu_features()
416 * We can assume any KVM supporting CPU is at least a v8 in kvm_arm_get_host_cpu_features()
425 ahcf->features = features; in kvm_arm_get_host_cpu_features()
432 CPUARMState *env = &cpu->env; in kvm_arm_set_cpu_features_from_host()
440 cpu->kvm_target = QEMU_KVM_ARM_TARGET_NONE; in kvm_arm_set_cpu_features_from_host()
441 cpu->host_cpu_probe_failed = true; in kvm_arm_set_cpu_features_from_host()
446 cpu->kvm_target = arm_host_cpu_features.target; in kvm_arm_set_cpu_features_from_host()
447 cpu->dtb_compatible = arm_host_cpu_features.dtb_compatible; in kvm_arm_set_cpu_features_from_host()
448 cpu->isar = arm_host_cpu_features.isar; in kvm_arm_set_cpu_features_from_host()
449 env->features = arm_host_cpu_features.features; in kvm_arm_set_cpu_features_from_host()
454 return !ARM_CPU(obj)->kvm_adjvtime; in kvm_no_adjvtime_get()
459 ARM_CPU(obj)->kvm_adjvtime = !value; in kvm_no_adjvtime_set()
464 return ARM_CPU(obj)->kvm_steal_time != ON_OFF_AUTO_OFF; in kvm_steal_time_get()
469 ARM_CPU(obj)->kvm_steal_time = value ? ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF; in kvm_steal_time_set()
472 /* KVM VCPU properties should be prefixed with "kvm-". */
475 CPUARMState *env = &cpu->env; in kvm_arm_add_vcpu_properties()
479 cpu->kvm_adjvtime = true; in kvm_arm_add_vcpu_properties()
480 object_property_add_bool(obj, "kvm-no-adjvtime", kvm_no_adjvtime_get, in kvm_arm_add_vcpu_properties()
482 object_property_set_description(obj, "kvm-no-adjvtime", in kvm_arm_add_vcpu_properties()
488 cpu->kvm_steal_time = ON_OFF_AUTO_AUTO; in kvm_arm_add_vcpu_properties()
489 object_property_add_bool(obj, "kvm-steal-time", kvm_steal_time_get, in kvm_arm_add_vcpu_properties()
491 object_property_set_description(obj, "kvm-steal-time", in kvm_arm_add_vcpu_properties()
492 "Set off to disable KVM steal time."); in kvm_arm_add_vcpu_properties()
502 KVMState *s = KVM_STATE(ms->accelerator); in kvm_arm_get_max_vm_ipa_size()
522 * whether we are using an in-kernel VGIC or not. in kvm_arch_init()
538 if (ms->smp.cpus > 256 && in kvm_arch_init()
542 ret = -EINVAL; in kvm_arch_init()
555 if (s->kvm_eager_split_size) { in kvm_arch_init()
560 s->kvm_eager_split_size = 0; in kvm_arch_init()
562 } else if (!(s->kvm_eager_split_size & sizes)) { in kvm_arch_init()
564 ret = -EINVAL; in kvm_arch_init()
567 s->kvm_eager_split_size); in kvm_arch_init()
570 strerror(-ret)); in kvm_arch_init()
588 return cpu->cpu_index; in kvm_arch_vcpu_id()
591 /* We track all the KVM devices which need their memory addresses
597 * need to do anything special for the KVM case.
620 if (section->mr == kd->mr) { in kvm_arm_devlistener_add()
621 kd->kda.addr = section->offset_within_address_space; in kvm_arm_devlistener_add()
632 if (section->mr == kd->mr) { in kvm_arm_devlistener_del()
633 kd->kda.addr = -1; in kvm_arm_devlistener_del()
639 .name = "kvm-arm",
647 struct kvm_device_attr *attr = &kd->kdattr; in kvm_arm_set_device_addr()
649 uint64_t addr = kd->kda.addr; in kvm_arm_set_device_addr()
651 addr |= kd->kda_addr_ormask; in kvm_arm_set_device_addr()
652 attr->addr = (uintptr_t)&addr; in kvm_arm_set_device_addr()
653 ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr); in kvm_arm_set_device_addr()
657 strerror(-ret)); in kvm_arm_set_device_addr()
667 if (kd->kda.addr != -1) { in kvm_arm_machine_init_done()
670 memory_region_unref(kd->mr); in kvm_arm_machine_init_done()
695 kd->mr = mr; in kvm_arm_register_device()
696 kd->kda.id = devid; in kvm_arm_register_device()
697 kd->kda.addr = -1; in kvm_arm_register_device()
698 kd->kdattr.flags = 0; in kvm_arm_register_device()
699 kd->kdattr.group = group; in kvm_arm_register_device()
700 kd->kdattr.attr = attr; in kvm_arm_register_device()
701 kd->dev_fd = dev_fd; in kvm_arm_register_device()
702 kd->kda_addr_ormask = addr_ormask; in kvm_arm_register_device()
704 memory_region_ref(kd->mr); in kvm_arm_register_device()
713 return -1; in compare_u64()
719 * cpreg_values are sorted in ascending order by KVM register ID
721 * the storage for a KVM register by ID with a binary search.
727 res = bsearch(®idx, cpu->cpreg_indexes, cpu->cpreg_array_len, in kvm_arm_get_cpreg_ptr()
731 return &cpu->cpreg_values[res - cpu->cpreg_indexes]; in kvm_arm_get_cpreg_ptr()
736 * @regidx: KVM register index
738 * Return true if this KVM register should be synchronized via the
759 * the previous TCG-created cpreg list).
772 if (ret != -E2BIG) { in kvm_arm_init_cpreg_list()
776 rlp->n = rl.n; in kvm_arm_init_cpreg_list()
784 qsort(&rlp->reg, rlp->n, sizeof(rlp->reg[0]), compare_u64); in kvm_arm_init_cpreg_list()
786 for (i = 0, arraylen = 0; i < rlp->n; i++) { in kvm_arm_init_cpreg_list()
787 if (!kvm_arm_reg_syncs_via_cpreg_list(rlp->reg[i])) { in kvm_arm_init_cpreg_list()
790 switch (rlp->reg[i] & KVM_REG_SIZE_MASK) { in kvm_arm_init_cpreg_list()
796 ret = -EINVAL; in kvm_arm_init_cpreg_list()
803 cpu->cpreg_indexes = g_renew(uint64_t, cpu->cpreg_indexes, arraylen); in kvm_arm_init_cpreg_list()
804 cpu->cpreg_values = g_renew(uint64_t, cpu->cpreg_values, arraylen); in kvm_arm_init_cpreg_list()
805 cpu->cpreg_vmstate_indexes = g_renew(uint64_t, cpu->cpreg_vmstate_indexes, in kvm_arm_init_cpreg_list()
807 cpu->cpreg_vmstate_values = g_renew(uint64_t, cpu->cpreg_vmstate_values, in kvm_arm_init_cpreg_list()
809 cpu->cpreg_array_len = arraylen; in kvm_arm_init_cpreg_list()
810 cpu->cpreg_vmstate_array_len = arraylen; in kvm_arm_init_cpreg_list()
812 for (i = 0, arraylen = 0; i < rlp->n; i++) { in kvm_arm_init_cpreg_list()
813 uint64_t regidx = rlp->reg[i]; in kvm_arm_init_cpreg_list()
817 cpu->cpreg_indexes[arraylen] = regidx; in kvm_arm_init_cpreg_list()
820 assert(cpu->cpreg_array_len == arraylen); in kvm_arm_init_cpreg_list()
827 ret = -EINVAL; in kvm_arm_init_cpreg_list()
838 * @regidx: KVM register index
864 for (i = 0; i < cpu->cpreg_array_len; i++) { in write_kvmstate_to_list()
865 uint64_t regidx = cpu->cpreg_indexes[i]; in write_kvmstate_to_list()
873 cpu->cpreg_values[i] = v32; in write_kvmstate_to_list()
877 ret = kvm_get_one_reg(cs, regidx, cpu->cpreg_values + i); in write_kvmstate_to_list()
895 for (i = 0; i < cpu->cpreg_array_len; i++) { in write_list_to_kvmstate()
896 uint64_t regidx = cpu->cpreg_indexes[i]; in write_list_to_kvmstate()
906 v32 = cpu->cpreg_values[i]; in write_list_to_kvmstate()
910 ret = kvm_set_one_reg(cs, regidx, cpu->cpreg_values + i); in write_list_to_kvmstate()
928 /* KVM virtual time adjustment */ in kvm_arm_cpu_pre_save()
929 if (cpu->kvm_vtime_dirty) { in kvm_arm_cpu_pre_save()
930 *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT) = cpu->kvm_vtime; in kvm_arm_cpu_pre_save()
940 * every register in the list; KVM is authoritative if in kvm_arm_cpu_post_load()
945 /* KVM virtual time adjustment */ in kvm_arm_cpu_post_load()
946 if (cpu->kvm_adjvtime) { in kvm_arm_cpu_post_load()
947 cpu->kvm_vtime = *kvm_arm_get_cpreg_ptr(cpu, KVM_REG_ARM_TIMER_CNT); in kvm_arm_cpu_post_load()
948 cpu->kvm_vtime_dirty = true; in kvm_arm_cpu_post_load()
958 /* Re-init VCPU so that all registers are set to in kvm_arm_reset_vcpu()
963 fprintf(stderr, "kvm_arm_vcpu_init failed: %s\n", strerror(-ret)); in kvm_arm_reset_vcpu()
974 * the list values back to KVM. It's OK to ignore failure returns here in kvm_arm_reset_vcpu()
981 * Update KVM's MP_STATE based on what QEMU thinks it is
987 .mp_state = (cpu->power_state == PSCI_OFF) ? in kvm_arm_sync_mpstate_to_kvm()
996 * Sync the KVM MP_STATE into QEMU
1006 cpu->power_state = (mp_state.mp_state == KVM_MP_STATE_STOPPED) ? in kvm_arm_sync_mpstate_to_qemu()
1016 * Gets the VCPU's virtual counter and stores it in the KVM CPU state.
1022 if (cpu->kvm_vtime_dirty) { in kvm_arm_get_virtual_time()
1026 ret = kvm_get_one_reg(CPU(cpu), KVM_REG_ARM_TIMER_CNT, &cpu->kvm_vtime); in kvm_arm_get_virtual_time()
1032 cpu->kvm_vtime_dirty = true; in kvm_arm_get_virtual_time()
1039 * Sets the VCPU's virtual counter to the value stored in the KVM CPU state.
1045 if (!cpu->kvm_vtime_dirty) { in kvm_arm_put_virtual_time()
1049 ret = kvm_set_one_reg(CPU(cpu), KVM_REG_ARM_TIMER_CNT, &cpu->kvm_vtime); in kvm_arm_put_virtual_time()
1055 cpu->kvm_vtime_dirty = false; in kvm_arm_put_virtual_time()
1062 * Put VCPU related state to kvm.
1068 CPUARMState *env = &cpu->env; in kvm_put_vcpu_events()
1077 events.exception.serror_pending = env->serror.pending; in kvm_put_vcpu_events()
1083 events.exception.serror_has_esr = env->serror.has_esr; in kvm_put_vcpu_events()
1084 events.exception.serror_esr = env->serror.esr; in kvm_put_vcpu_events()
1099 * Get VCPU related state from kvm.
1105 CPUARMState *env = &cpu->env; in kvm_get_vcpu_events()
1120 env->serror.pending = events.exception.serror_pending; in kvm_get_vcpu_events()
1121 env->serror.has_esr = events.exception.serror_has_esr; in kvm_get_vcpu_events()
1122 env->serror.esr = events.exception.serror_esr; in kvm_get_vcpu_events()
1136 * FS[4] - DFSR[10]
1137 * FS[3:0] - DFSR[3:0]
1162 CPUARMState *env = &cpu->env; in kvm_arm_verify_ext_dabt_pending()
1187 CPUARMState *env = &cpu->env; in kvm_arch_pre_run()
1189 if (unlikely(env->ext_dabt_raised)) { in kvm_arch_pre_run()
1192 * otherwise risking indefinitely re-running the faulting instruction in kvm_arch_pre_run()
1195 * an IMPLEMENTATION DEFINED exception (for 32-bit EL1) in kvm_arch_pre_run()
1201 "guest memory access. KVM unable to emulate faulting " in kvm_arch_pre_run()
1207 env->ext_dabt_raised = 0; in kvm_arch_pre_run()
1218 * We only need to sync timer states with user-space interrupt in kvm_arch_post_run()
1226 /* Synchronize our shadowed in-kernel device irq lines with the kvm ones */ in kvm_arch_post_run()
1227 if (run->s.regs.device_irq_level != cpu->device_irq_level) { in kvm_arch_post_run()
1228 switched_level = cpu->device_irq_level ^ run->s.regs.device_irq_level; in kvm_arch_post_run()
1233 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_VIRT], in kvm_arch_post_run()
1234 !!(run->s.regs.device_irq_level & in kvm_arch_post_run()
1240 qemu_set_irq(cpu->gt_timer_outputs[GTIMER_PHYS], in kvm_arch_post_run()
1241 !!(run->s.regs.device_irq_level & in kvm_arch_post_run()
1247 qemu_set_irq(cpu->pmu_interrupt, in kvm_arch_post_run()
1248 !!(run->s.regs.device_irq_level & KVM_ARM_DEV_PMU)); in kvm_arch_post_run()
1253 qemu_log_mask(LOG_UNIMP, "%s: unhandled in-kernel device IRQ %x\n", in kvm_arch_post_run()
1258 cpu->device_irq_level = run->s.regs.device_irq_level; in kvm_arch_post_run()
1270 if (cpu->kvm_adjvtime) { in kvm_arm_vm_state_change()
1274 if (cpu->kvm_adjvtime) { in kvm_arm_vm_state_change()
1284 * ISV bit set to '0b0' -> no valid instruction syndrome
1292 CPUARMState *env = &cpu->env; in kvm_arm_handle_dabt_nisv()
1294 * Request KVM to inject the external data abort into the guest in kvm_arm_handle_dabt_nisv()
1299 * The external data abort event will be handled immediately by KVM in kvm_arm_handle_dabt_nisv()
1308 env->ext_dabt_raised = 1; in kvm_arm_handle_dabt_nisv()
1315 error_printf("KVM unable to emulate faulting instruction.\n"); in kvm_arm_handle_dabt_nisv()
1317 return -1; in kvm_arm_handle_dabt_nisv()
1323 * @debug_exit: debug part of the KVM exit structure
1329 * To minimise translating between kernel and user-space the kernel
1330 * ABI just provides user-space with the full exception syndrome
1331 * register value to be decoded in QEMU.
1336 int hsr_ec = syn_get_ec(debug_exit->hsr); in kvm_arm_handle_debug()
1338 CPUARMState *env = &cpu->env; in kvm_arm_handle_debug()
1345 if (cs->singlestep_enabled) { in kvm_arm_handle_debug()
1352 error_report("%s: guest single-step while debugging unsupported" in kvm_arm_handle_debug()
1354 __func__, env->pc, debug_exit->hsr); in kvm_arm_handle_debug()
1359 if (kvm_find_sw_breakpoint(cs, env->pc)) { in kvm_arm_handle_debug()
1364 if (find_hw_breakpoint(cs, env->pc)) { in kvm_arm_handle_debug()
1370 CPUWatchpoint *wp = find_hw_watchpoint(cs, debug_exit->far); in kvm_arm_handle_debug()
1372 cs->watchpoint_hit = wp; in kvm_arm_handle_debug()
1379 __func__, debug_exit->hsr, env->pc); in kvm_arm_handle_debug()
1383 * the guest. Let's re-use the existing TCG interrupt code to set in kvm_arm_handle_debug()
1386 cs->exception_index = EXCP_BKPT; in kvm_arm_handle_debug()
1387 env->exception.syndrome = debug_exit->hsr; in kvm_arm_handle_debug()
1388 env->exception.vaddress = debug_exit->far; in kvm_arm_handle_debug()
1389 env->exception.target_el = 1; in kvm_arm_handle_debug()
1402 switch (run->exit_reason) { in kvm_arch_handle_exit()
1404 if (kvm_arm_handle_debug(cpu, &run->debug.arch)) { in kvm_arch_handle_exit()
1410 ret = kvm_arm_handle_dabt_nisv(cpu, run->arm_nisv.esr_iss, in kvm_arch_handle_exit()
1411 run->arm_nisv.fault_ipa); in kvm_arch_handle_exit()
1414 qemu_log_mask(LOG_UNIMP, "%s: un-handled exit reason %d\n", in kvm_arch_handle_exit()
1415 __func__, run->exit_reason); in kvm_arch_handle_exit()
1456 ptr->dbg_wcr[i] = wp->wcr; in kvm_arm_copy_hw_debug_data()
1457 ptr->dbg_wvr[i] = wp->wvr; in kvm_arm_copy_hw_debug_data()
1461 ptr->dbg_bcr[i] = bp->bcr; in kvm_arm_copy_hw_debug_data()
1462 ptr->dbg_bvr[i] = bp->bvr; in kvm_arm_copy_hw_debug_data()
1469 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP; in kvm_arch_update_guest_debug()
1472 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW; in kvm_arch_update_guest_debug()
1473 kvm_arm_copy_hw_debug_data(&dbg->arch); in kvm_arch_update_guest_debug()
1484 error_report("-machine kernel_irqchip=split is not supported on ARM."); in kvm_arch_irqchip_create()
1553 route->u.msi.address_lo = doorbell_gpa; in kvm_arch_fixup_msi_route()
1554 route->u.msi.address_hi = doorbell_gpa >> 32; in kvm_arch_fixup_msi_route()
1574 return (data - 32) & 0xffff; in kvm_arch_msi_data_to_gsi()
1582 uint64_t value = s->kvm_eager_split_size; in kvm_arch_get_eager_split_size()
1594 if (s->fd != -1) { in kvm_arch_set_eager_split_size()
1595 error_setg(errp, "Unable to set early-split-size after KVM has been initialized"); in kvm_arch_set_eager_split_size()
1604 error_setg(errp, "early-split-size must be a power of two"); in kvm_arch_set_eager_split_size()
1608 s->kvm_eager_split_size = value; in kvm_arch_set_eager_split_size()
1613 object_class_property_add(oc, "eager-split-size", "size", in kvm_arch_accel_class_init()
1617 object_class_property_set_description(oc, "eager-split-size", in kvm_arch_accel_class_init()
1632 return -ENOSYS; in kvm_arch_insert_hw_breakpoint()
1646 return -ENOSYS; in kvm_arch_remove_hw_breakpoint()
1667 error_report("%s: KVM_HAS_DEVICE_ATTR: %s", name, strerror(-err)); in kvm_arm_set_device_attr()
1673 error_report("%s: KVM_SET_DEVICE_ATTR: %s", name, strerror(-err)); in kvm_arm_set_device_attr()
1687 if (!cpu->has_pmu) { in kvm_arm_pmu_init()
1704 if (!cpu->has_pmu) { in kvm_arm_pmu_set_irq()
1721 if (cpu->kvm_steal_time == ON_OFF_AUTO_OFF) { in kvm_arm_pvtime_init()
1734 if (cpu->kvm_steal_time == ON_OFF_AUTO_AUTO) { in kvm_arm_steal_time_finalize()
1735 if (!has_steal_time || !arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { in kvm_arm_steal_time_finalize()
1736 cpu->kvm_steal_time = ON_OFF_AUTO_OFF; in kvm_arm_steal_time_finalize()
1738 cpu->kvm_steal_time = ON_OFF_AUTO_ON; in kvm_arm_steal_time_finalize()
1740 } else if (cpu->kvm_steal_time == ON_OFF_AUTO_ON) { in kvm_arm_steal_time_finalize()
1742 error_setg(errp, "'kvm-steal-time' cannot be enabled " in kvm_arm_steal_time_finalize()
1745 } else if (!arm_feature(&cpu->env, ARM_FEATURE_AARCH64)) { in kvm_arm_steal_time_finalize()
1753 error_setg(errp, "'kvm-steal-time' cannot be enabled " in kvm_arm_steal_time_finalize()
1786 * KVM ensures all host CPUs support the same set of vector lengths. in kvm_arm_sve_get_vls()
1792 .target = -1, in kvm_arm_sve_get_vls()
1815 for (i = KVM_ARM64_SVE_VLS_WORDS - 1; i >= 0; --i) { in kvm_arm_sve_get_vls()
1817 vq = 64 - clz64(vls[i]) + i * 64; in kvm_arm_sve_get_vls()
1822 warn_report("KVM supports vector lengths larger than " in kvm_arm_sve_get_vls()
1823 "QEMU can enable"); in kvm_arm_sve_get_vls()
1833 uint64_t vls[KVM_ARM64_SVE_VLS_WORDS] = { cpu->sve_vq.map }; in kvm_arm_sve_set_vls()
1835 assert(cpu->sve_max_vq <= KVM_ARM64_SVE_VQ_MAX); in kvm_arm_sve_set_vls()
1852 CPUARMState *env = &cpu->env; in kvm_arch_init_vcpu()
1855 if (cpu->kvm_target == QEMU_KVM_ARM_TARGET_NONE) { in kvm_arch_init_vcpu()
1856 error_report("KVM is not supported for this guest CPU type"); in kvm_arch_init_vcpu()
1857 return -EINVAL; in kvm_arch_init_vcpu()
1863 memset(cpu->kvm_init_features, 0, sizeof(cpu->kvm_init_features)); in kvm_arch_init_vcpu()
1864 if (cs->start_powered_off) { in kvm_arch_init_vcpu()
1865 cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_POWER_OFF; in kvm_arch_init_vcpu()
1867 if (kvm_check_extension(cs->kvm_state, KVM_CAP_ARM_PSCI_0_2)) { in kvm_arch_init_vcpu()
1868 cpu->psci_version = QEMU_PSCI_VERSION_0_2; in kvm_arch_init_vcpu()
1869 cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PSCI_0_2; in kvm_arch_init_vcpu()
1872 cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_EL1_32BIT; in kvm_arch_init_vcpu()
1874 if (cpu->has_pmu) { in kvm_arch_init_vcpu()
1875 cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_PMU_V3; in kvm_arch_init_vcpu()
1879 cpu->kvm_init_features[0] |= 1 << KVM_ARM_VCPU_SVE; in kvm_arch_init_vcpu()
1882 cpu->kvm_init_features[0] |= (1 << KVM_ARM_VCPU_PTRAUTH_ADDRESS | in kvm_arch_init_vcpu()
1904 * KVM reports the exact PSCI version it is implementing via a in kvm_arch_init_vcpu()
1907 * in the same 15-bits major 16-bits minor format that PSCI_VERSION in kvm_arch_init_vcpu()
1911 cpu->psci_version = psciver; in kvm_arch_init_vcpu()
1915 * When KVM is in use, PSCI is emulated in-kernel and not by qemu. in kvm_arch_init_vcpu()
1916 * Currently KVM has its own idea about MPIDR assignment, so we in kvm_arch_init_vcpu()
1917 * override our defaults with what we get from KVM. in kvm_arch_init_vcpu()
1923 cpu->mp_affinity = mpidr & ARM64_AFFINITY_MASK; in kvm_arch_init_vcpu()
1937 CPUARMState *env = &cpu->env; in kvm_inject_arm_sea()
1941 c->exception_index = EXCP_DATA_ABORT; in kvm_inject_arm_sea()
1942 env->exception.target_el = 1; in kvm_inject_arm_sea()
1948 same_el = arm_current_el(env) == env->exception.target_el; in kvm_inject_arm_sea()
1951 env->exception.syndrome = esr; in kvm_inject_arm_sea()
1967 CPUARMState *env = &ARM_CPU(cs)->env; in kvm_arch_put_fpsimd()
1988 * KVM SVE registers come in slices where ZREGs have a slice size of 2048 bits
1996 CPUARMState *env = &cpu->env; in kvm_arch_put_sve()
2002 r = sve_bswap64(tmp, &env->vfp.zregs[n].d[0], cpu->sve_max_vq * 2); in kvm_arch_put_sve()
2010 r = sve_bswap64(tmp, r = &env->vfp.pregs[n].p[0], in kvm_arch_put_sve()
2011 DIV_ROUND_UP(cpu->sve_max_vq * 2, 8)); in kvm_arch_put_sve()
2018 r = sve_bswap64(tmp, &env->vfp.pregs[FFR_PRED_NUM].p[0], in kvm_arch_put_sve()
2019 DIV_ROUND_UP(cpu->sve_max_vq * 2, 8)); in kvm_arch_put_sve()
2036 CPUARMState *env = &cpu->env; in kvm_arch_put_registers()
2039 * AArch64 registers before pushing them out to 64-bit KVM. in kvm_arch_put_registers()
2047 &env->xregs[i]); in kvm_arch_put_registers()
2053 /* KVM puts SP_EL0 in regs.sp and SP_EL1 in regs.sp_el1. On the in kvm_arch_put_registers()
2054 * QEMU side we keep the current SP in xregs[31] as well. in kvm_arch_put_registers()
2058 ret = kvm_set_one_reg(cs, AARCH64_CORE_REG(regs.sp), &env->sp_el[0]); in kvm_arch_put_registers()
2063 ret = kvm_set_one_reg(cs, AARCH64_CORE_REG(sp_el1), &env->sp_el[1]); in kvm_arch_put_registers()
2068 /* Note that KVM thinks pstate is 64 bit but we use a uint32_t */ in kvm_arch_put_registers()
2079 ret = kvm_set_one_reg(cs, AARCH64_CORE_REG(regs.pc), &env->pc); in kvm_arch_put_registers()
2084 ret = kvm_set_one_reg(cs, AARCH64_CORE_REG(elr_el1), &env->elr_el[1]); in kvm_arch_put_registers()
2092 * ensure that any modifications to env->spsr are correctly in kvm_arch_put_registers()
2097 i = bank_number(env->uncached_cpsr & CPSR_M); in kvm_arch_put_registers()
2098 env->banked_spsr[i] = env->spsr; in kvm_arch_put_registers()
2101 /* KVM 0-4 map to QEMU banks 1-5 */ in kvm_arch_put_registers()
2104 &env->banked_spsr[i + 1]); in kvm_arch_put_registers()
2134 return -EINVAL; in kvm_arch_put_registers()
2139 * to avoid overwriting potential changes made by KVM upon calling in kvm_arch_put_registers()
2152 CPUARMState *env = &ARM_CPU(cs)->env; in kvm_arch_get_fpsimd()
2172 * KVM SVE registers come in slices where ZREGs have a slice size of 2048 bits
2180 CPUARMState *env = &cpu->env; in kvm_arch_get_sve()
2185 r = &env->vfp.zregs[n].d[0]; in kvm_arch_get_sve()
2190 sve_bswap64(r, r, cpu->sve_max_vq * 2); in kvm_arch_get_sve()
2194 r = &env->vfp.pregs[n].p[0]; in kvm_arch_get_sve()
2199 sve_bswap64(r, r, DIV_ROUND_UP(cpu->sve_max_vq * 2, 8)); in kvm_arch_get_sve()
2202 r = &env->vfp.pregs[FFR_PRED_NUM].p[0]; in kvm_arch_get_sve()
2207 sve_bswap64(r, r, DIV_ROUND_UP(cpu->sve_max_vq * 2, 8)); in kvm_arch_get_sve()
2220 CPUARMState *env = &cpu->env; in kvm_arch_get_registers()
2224 &env->xregs[i]); in kvm_arch_get_registers()
2230 ret = kvm_get_one_reg(cs, AARCH64_CORE_REG(regs.sp), &env->sp_el[0]); in kvm_arch_get_registers()
2235 ret = kvm_get_one_reg(cs, AARCH64_CORE_REG(sp_el1), &env->sp_el[1]); in kvm_arch_get_registers()
2245 env->aarch64 = ((val & PSTATE_nRW) == 0); in kvm_arch_get_registers()
2252 /* KVM puts SP_EL0 in regs.sp and SP_EL1 in regs.sp_el1. On the in kvm_arch_get_registers()
2253 * QEMU side we keep the current SP in xregs[31] as well. in kvm_arch_get_registers()
2257 ret = kvm_get_one_reg(cs, AARCH64_CORE_REG(regs.pc), &env->pc); in kvm_arch_get_registers()
2263 * incoming AArch64 regs received from 64-bit KVM. in kvm_arch_get_registers()
2271 ret = kvm_get_one_reg(cs, AARCH64_CORE_REG(elr_el1), &env->elr_el[1]); in kvm_arch_get_registers()
2278 * KVM SPSRs 0-4 map to QEMU banks 1-5 in kvm_arch_get_registers()
2282 &env->banked_spsr[i + 1]); in kvm_arch_get_registers()
2290 i = bank_number(env->uncached_cpsr & CPSR_M); in kvm_arch_get_registers()
2291 env->spsr = env->banked_spsr[i]; in kvm_arch_get_registers()
2321 return -EINVAL; in kvm_arch_get_registers()
2344 kvm_physical_memory_addr_from_host(c->kvm_state, addr, &paddr)) { in kvm_arch_on_sigbus_vcpu()
2370 "QEMU itself instead of guest system!", addr); in kvm_arch_on_sigbus_vcpu()
2385 if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, 4, 0) || in kvm_arch_insert_sw_breakpoint()
2386 cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&brk_insn, 4, 1)) { in kvm_arch_insert_sw_breakpoint()
2387 return -EINVAL; in kvm_arch_insert_sw_breakpoint()
2396 if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&brk, 4, 0) || in kvm_arch_remove_sw_breakpoint()
2398 cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, 4, 1)) { in kvm_arch_remove_sw_breakpoint()
2399 return -EINVAL; in kvm_arch_remove_sw_breakpoint()
2414 * MTE on KVM is enabled on a per-VM basis (and retrying doesn't make in kvm_arm_enable_mte()
2421 error_setg_errno(errp, -ret, "Failed to enable KVM_CAP_ARM_MTE"); in kvm_arm_enable_mte()
2437 cpu->kvm_mte = true; in kvm_arm_enable_mte()
2444 CPUARMState *env = &cpu->env; in arm_cpu_kvm_set_irq()
2463 env->irq_line_state |= linestate_bit; in arm_cpu_kvm_set_irq()
2465 env->irq_line_state &= ~linestate_bit; in arm_cpu_kvm_set_irq()
2467 kvm_arm_set_irq(cs->cpu_index, KVM_ARM_IRQ_TYPE_CPU, irq_id, !!level); in arm_cpu_kvm_set_irq()