target/arm/debug_helper.c

117         spd = extract32(env->cp15.mdcr_el3, 14, 2);  in aa32_generate_debug_exceptions()
951     { .name = "DBGDRAR", .cp = 14, .crn = 1, .crm = 0, .opc1 = 0, .opc2 = 0,
958     { .name = "DBGDSAR", .cp = 14, .crn = 2, .crm = 0, .opc1 = 0, .opc2 = 0,
963       .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 2,
983     { .name = "OSDTRRX_EL1", .state = ARM_CP_STATE_BOTH, .cp = 14,
987     { .name = "OSDTRTX_EL1", .state = ARM_CP_STATE_BOTH, .cp = 14,
992     { .name = "DBGDTR_EL0", .state = ARM_CP_STATE_BOTH, .cp = 14,
1001     { .name = "OSECCR_EL1", .state = ARM_CP_STATE_BOTH, .cp = 14,
1012       .cp = 14, .opc1 = 0, .crn = 0, .crm = 1, .opc2 = 0,
1017       .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 1, .crm = 0, .opc2 = 4,
1023       .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 1, .crm = 1, .opc2 = 4,
1030       .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 1, .crm = 3, .opc2 = 4,
1040       .cp = 14, .opc1 = 0, .crn = 0, .crm = 7, .opc2 = 0,
1049       .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = 2, .opc2 = 0,
1058       .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 7, .crm = 8, .opc2 = 6,
1064       .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 7, .crm = 9, .opc2 = 6,
1086     { .name = "DBGDRAR", .cp = 14, .crm = 1, .opc1 = 0,
1089     { .name = "DBGDSAR", .cp = 14, .crm = 2, .opc1 = 0,
1178             .name = "DBGDIDR", .cp = 14, .crn = 0, .crm = 0,  in define_debug_regs()
1199             .cp = 14, .opc1 = 0, .crn = 7, .opc2 = 2, .crn = 7,  in define_debug_regs()
1209                 .cp = 14, .opc1 = 0, .crn = 7, .opc2 = 1, .crn = 7,  in define_debug_regs()
1214                 .cp = 14, .opc1 = 0, .crn = 7, .opc2 = 0, .crn = 7,  in define_debug_regs()
1242               .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = i, .opc2 = 4,  in define_debug_regs()
1249               .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = i, .opc2 = 5,  in define_debug_regs()
1266               .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = i, .opc2 = 6,  in define_debug_regs()
1273               .cp = 14, .opc0 = 2, .opc1 = 0, .crn = 0, .crm = i, .opc2 = 7,  in define_debug_regs()