578         self.config.get() & (1 << HPET_CFG_LEG_RT_SHIFT) != 0  in is_legacy_mode()
582         self.config.get() & (1 << HPET_CFG_ENABLE_SHIFT) != 0  in is_hpet_enabled()
586         self.int_status.get() & (1 << index) != 0  in is_timer_int_active()
590         ns_to_ticks(CLOCK_VIRTUAL.get_ns() + self.hpet_offset.get())  in get_ticks()
594         ticks_to_ns(tick) - self.hpet_offset.get()  in get_ns()
618             .set(self.int_status.get().deposit(index, 1, u64::from(level)));  in update_int_status()
623         let old_val = self.config.get();  in set_cfg_reg()
632                 .set(ticks_to_ns(self.counter.get()) - CLOCK_VIRTUAL.get_ns());  in set_cfg_reg()
660             self.irqs[RTC_ISA_IRQ].set(self.rtc_irq_level.get() != 0);  in set_cfg_reg()
667         let cleared = new_val & self.int_status.get();  in set_int_status_reg()
690             .set(self.counter.get().deposit(shift, len, val));  in set_counter_reg()
761             self.hpet_id.get(),  in reset_hold()
762             self.capability.get() as u32,  in reset_hold()
803             Global(CAP) => self.capability.get(), /* including HPET_PERIOD 0x004 */  in read()
804             Global(CFG) => self.config.get(),  in read()
805             Global(INT_STATUS) => self.int_status.get(),  in read()
812                     self.counter.get()  in read()
858             t.cmp64 = t.calculate_cmp64(t.get_state().counter.get(), t.cmp);  in post_load()
865                 .set(ticks_to_ns(self.counter.get()) - CLOCK_VIRTUAL.get_ns());  in post_load()
872         self.rtc_irq_level.get() != 0  in is_rtc_irq_level_needed()
880         self.num_timers == self.num_timers_save.get().into()  in validate_num_timers()