6 //! integer bitmaps. [`Data`], [`Control`], [`LineControl`], etc.
48     /// line control register (data frame format)
69     /// DMA control Register
151 /// This has the usual inbound RS232 modem-control signals, plus flags
196 /// Line Control Register, `UARTLCR_H`
237 /// `EPS` "Even parity select", field of [Line Control
246 /// `FEN` "Enable FIFOs" or Device mode, field of [Line Control
258 /// `WLEN` Word length, field of [Line Control register](LineControl).
273 /// Control Register, `UARTCR`
275 /// The `UARTCR` register is the control register. It contains various
277 /// modem control signals. All bits reset to 0 except TXE and RXE.
281 pub struct Control {  struct
305     /// `RTSEn` RTS hardware flow control enable
307     /// `CTSEn` CTS hardware flow control enable
312 impl_vmstate_bitsized!(Control);  argument
314 impl Control {  implementation
322 impl Default for Control {  implementation