1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2 /* Copyright (c) 2021-2022, NVIDIA CORPORATION & AFFILIATES.
16  * ioctl is passed in a structure pointer as the argument providing the size of
23  *  - ENOTTY: The IOCTL number itself is not supported at all
24  *  - E2BIG: The IOCTL number is supported, but the provided structure has
25  *    non-zero in a part the kernel does not understand.
26  *  - EOPNOTSUPP: The IOCTL number is supported, and the structure is
29  *  - EINVAL: Everything about the IOCTL was understood, but a field is not
31  *  - ENOENT: An ID or IOVA provided does not exist.
32  *  - ENOMEM: Out of memory.
33  *  - EOVERFLOW: Mathematics overflowed.
35  * As well as additional errnos, within specific ioctls.
37 enum {
62  * struct iommu_destroy - ioctl(IOMMU_DESTROY)
75  * struct iommu_ioas_alloc - ioctl(IOMMU_IOAS_ALLOC)
77  * @flags: Must be 0
85 	__u32 flags;  member
91  * struct iommu_iova_range - ioctl(IOMMU_IOVA_RANGE)
103  * struct iommu_ioas_iova_ranges - ioctl(IOMMU_IOAS_IOVA_RANGES)
113  * the allowed_iovas[] will be filled in as space permits.
123  * the total number of iovas filled in. The ioctl will return -EMSGSIZE and set
125  * caller should allocate a larger output array and re-issue the ioctl.
147  * struct iommu_ioas_allow_iovas - ioctl(IOMMU_IOAS_ALLOW_IOVAS)
159  * When an IOAS is first created the IOVA_RANGES will be maximally sized, and as
179  * enum iommufd_ioas_map_flags - Flags for map and copy
185 enum iommufd_ioas_map_flags {
192  * struct iommu_ioas_map - ioctl(IOMMU_IOAS_MAP)
194  * @flags: Combination of enum iommufd_ioas_map_flags
200  *        then this must be provided as input.
212 	__u32 flags;  member
222  * struct iommu_ioas_map_file - ioctl(IOMMU_IOAS_MAP_FILE)
224  * @flags: same as for iommu_ioas_map
225  * @ioas_id: same as for iommu_ioas_map
228  * @length: same as for iommu_ioas_map
229  * @iova: same as for iommu_ioas_map
236 	__u32 flags;  member
246  * struct iommu_ioas_copy - ioctl(IOMMU_IOAS_COPY)
248  * @flags: Combination of enum iommufd_ioas_map_flags
253  *            set then this must be provided as input.
260  * This may be used to efficiently clone a subset of an IOAS to another, or as a
262  * establishing equivalent new mappings, as internal resources are shared, and
267 	__u32 flags;  member
277  * struct iommu_ioas_unmap - ioctl(IOMMU_IOAS_UNMAP)
297  * enum iommufd_option - ioctl(IOMMU_OPTION_RLIMIT_MODE) and
306  *    PAGE_SIZE. This can be useful for benchmarking.  This is a per-IOAS
309 enum iommufd_option {
315  * enum iommufd_option_ops - ioctl(IOMMU_OPTION_OP_SET) and
320 enum iommufd_option_ops {
326  * struct iommu_option - iommu option multiplexer
328  * @option_id: One of enum iommufd_option
329  * @op: One of enum iommufd_option_ops
349  * enum iommufd_vfio_ioas_op - IOMMU_VFIO_IOAS_* ioctls
354 enum iommufd_vfio_ioas_op {
361  * struct iommu_vfio_ioas - ioctl(IOMMU_VFIO_IOAS)
365  * @op: One of enum iommufd_vfio_ioas_op
373  * this ioctl. SET or CLEAR does not destroy any auto-created IOAS.
384  * enum iommufd_hwpt_alloc_flags - Flags for HWPT allocation
385  * @IOMMU_HWPT_ALLOC_NEST_PARENT: If set, allocate a HWPT that can serve as
393  *                          Any domain attached to the non-PASID part of the
397  *                          not recommended for both the non-PASID part
400  *                          error (-EOPNOTSUPP).
402 enum iommufd_hwpt_alloc_flags {
410  * enum iommu_hwpt_vtd_s1_flags - Intel VT-d stage-1 page table
416 enum iommu_hwpt_vtd_s1_flags {
423  * struct iommu_hwpt_vtd_s1 - Intel VT-d stage-1 page table
425  * @flags: Combination of enum iommu_hwpt_vtd_s1_flags
426  * @pgtbl_addr: The base address of the stage-1 page table.
427  * @addr_width: The address width of the stage-1 page table
431 	__aligned_u64 flags;  member
438  * struct iommu_hwpt_arm_smmuv3 - ARM SMMUv3 nested STE
442  *       the translation. Must be little-endian.
444  *       - word-0: V, Cfg, S1Fmt, S1ContextPtr, S1CDMax
445  *       - word-1: EATS, S1DSS, S1CIR, S1COR, S1CSH, S1STALLD
447  * -EIO will be returned if @ste is not legal or contains any non-allowed field.
449  * nested domain will translate the same as the nesting parent. The S1 will
458  * enum iommu_hwpt_data_type - IOMMU HWPT Data Type
460  * @IOMMU_HWPT_DATA_VTD_S1: Intel VT-d stage-1 page table
463 enum iommu_hwpt_data_type {
470  * struct iommu_hwpt_alloc - ioctl(IOMMU_HWPT_ALLOC)
472  * @flags: Combination of enum iommufd_hwpt_alloc_flags
477  * @data_type: One of enum iommu_hwpt_data_type
480  * @fault_id: The ID of IOMMUFD_FAULT object. Valid only if flags field of
482  * @__reserved2: Padding to 64-bit alignment. Must be 0.
488  * A kernel-managed HWPT will be created with the mappings from the given
490  * IOMMU_HWPT_DATA_NONE. The HWPT can be allocated as a parent HWPT for a
491  * nesting configuration by passing IOMMU_HWPT_ALLOC_NEST_PARENT via @flags.
493  * A user-managed nested HWPT will be created from a given vIOMMU (wrapping a
496  * case, the @data_type must be set to a pre-defined type corresponding to an
507 	__u32 flags;  member
521  * enum iommu_hw_info_vtd_flags - Flags for VT-d hw_info
522  * @IOMMU_HW_INFO_VTD_ERRATA_772415_SPR17: If set, disallow read-only mappings
524 …                 https://www.intel.com/content/www/us/en/content-details/772415/content-details.ht…
526 enum iommu_hw_info_vtd_flags {
531  * struct iommu_hw_info_vtd - Intel VT-d hardware information
533  * @flags: Combination of enum iommu_hw_info_vtd_flags
536  * @cap_reg: Value of Intel VT-d capability register defined in VT-d spec
538  * @ecap_reg: Value of Intel VT-d capability register defined in VT-d spec
541  * User needs to understand the Intel VT-d specification to decode the
545 	__u32 flags;  member
552  * struct iommu_hw_info_arm_smmuv3 - ARM SMMUv3 hardware information
555  * @flags: Must be set to 0
557  * @idr: Implemented features for ARM SMMU Non-secure programming interface
573  * - S1P should be assumed to be true if a NESTED HWPT can be created
574  * - VFIO/iommufd only support platforms with COHACC, it should be assumed to be
576  * - ATS is a per-device property. If the VMM describes any devices as ATS
586 	__u32 flags;  member
594  * enum iommu_hw_info_type - IOMMU Hardware Info Types
597  * @IOMMU_HW_INFO_TYPE_INTEL_VTD: Intel VT-d iommu info type
600 enum iommu_hw_info_type {
607  * enum iommufd_hw_capabilities
622 enum iommufd_hw_capabilities {
629  * struct iommu_hw_info - ioctl(IOMMU_GET_HW_INFO)
631  * @flags: Must be 0
635  * @data_uptr: User pointer to a user-space buffer used by the kernel to fill
637  * @out_data_type: Output the iommu hardware info type as defined in the enum
639  * @out_capabilities: Output the generic iommu capability info type as defined
640  *                    in the enum iommu_hw_capabilities.
650  * a guest stage-1 page table can be compatible with the physical iommu.
662 	__u32 flags;  member
674  * enum iommufd_hwpt_set_dirty_tracking_flags - Flags for steering dirty
678 enum iommufd_hwpt_set_dirty_tracking_flags {
683  * struct iommu_hwpt_set_dirty_tracking - ioctl(IOMMU_HWPT_SET_DIRTY_TRACKING)
685  * @flags: Combination of enum iommufd_hwpt_set_dirty_tracking_flags
693 	__u32 flags;  member
701  * enum iommufd_hwpt_get_dirty_bitmap_flags - Flags for getting dirty bits
709 enum iommufd_hwpt_get_dirty_bitmap_flags {
714  * struct iommu_hwpt_get_dirty_bitmap - ioctl(IOMMU_HWPT_GET_DIRTY_BITMAP)
717  * @flags: Combination of enum iommufd_hwpt_get_dirty_bitmap_flags
736 	__u32 flags;  member
747  * enum iommu_hwpt_invalidate_data_type - IOMMU HWPT Cache Invalidation
752 enum iommu_hwpt_invalidate_data_type {
758  * enum iommu_hwpt_vtd_s1_invalidate_flags - Flags for Intel VT-d
759  *                                           stage-1 cache invalidation
761  *                            to all-levels page structure cache or just
764 enum iommu_hwpt_vtd_s1_invalidate_flags {
769  * struct iommu_hwpt_vtd_s1_invalidate - Intel VT-d cache invalidation
774  * @flags: Combination of enum iommu_hwpt_vtd_s1_invalidate_flags
777  * The Intel VT-d specific invalidation data for user-managed stage-1 cache
779  * tell the impacted cache scope after modifying the stage-1 page table.
789 	__u32 flags;  member
794  * struct iommu_viommu_arm_smmuv3_invalidate - ARM SMMUv3 cache invalidation
796  * @cmd: 128-bit cache invalidation command that runs in SMMU CMDQ.
797  *       Must be little-endian.
809  * -EIO will be returned if the command is not supported.
816  * struct iommu_hwpt_invalidate - ioctl(IOMMU_HWPT_INVALIDATE)
819  * @data_uptr: User pointer to an array of driver-specific cache invalidation
821  * @data_type: One of enum iommu_hwpt_invalidate_data_type, defining the data
829  * Invalidate iommu cache for user-managed page table or vIOMMU. Modifications
830  * on a user-managed page table should be followed by this operation, if a HWPT
831  * is passed in via @hwpt_id. Other caches, such as device cache or descriptor
853  * enum iommu_hwpt_pgfault_flags - flags for struct iommu_hwpt_pgfault
858 enum iommu_hwpt_pgfault_flags {
864  * enum iommu_hwpt_pgfault_perm - perm bits for struct iommu_hwpt_pgfault
873 enum iommu_hwpt_pgfault_perm {
881  * struct iommu_hwpt_pgfault - iommu page fault data
882  * @flags: Combination of enum iommu_hwpt_pgfault_flags
886  * @perm: Combination of enum iommu_hwpt_pgfault_perm
891  *          transfer, it could fill in 10MB and the OS could pre-fault in
893  * @cookie: kernel-managed cookie identifying a group of fault messages. The
898 	__u32 flags;  member
910  * enum iommufd_page_response_code - Return status of fault handlers
918 enum iommufd_page_response_code {
924  * struct iommu_hwpt_page_response - IOMMU page fault response
925  * @cookie: The kernel-managed cookie reported in the fault message.
926  * @code: One of response code in enum iommufd_page_response_code.
934  * struct iommu_fault_alloc - ioctl(IOMMU_FAULT_QUEUE_ALLOC)
936  * @flags: Must be 0
944 	__u32 flags;  member
951  * enum iommu_viommu_type - Virtual IOMMU Type
955 enum iommu_viommu_type {
961  * struct iommu_viommu_alloc - ioctl(IOMMU_VIOMMU_ALLOC)
963  * @flags: Must be 0
964  * @type: Type of the virtual IOMMU. Must be defined in enum iommu_viommu_type
970  * virtualization support that is a security-isolated slice of the real IOMMU HW
972  * to the vIOMMU, such as:
973  * - Security namespace for guest owned ID, e.g. guest-controlled cache tags
974  * - Non-device-affiliated event reporting, e.g. invalidation queue errors
975  * - Access to a sharable nesting parent pagetable across physical IOMMUs
976  * - Virtualization of various platforms IDs, e.g. RIDs and others
977  * - Delivery of paravirtualized invalidation
978  * - Direct assigned invalidation queues
979  * - Direct assigned interrupts
983 	__u32 flags;  member
992  * struct iommu_vdevice_alloc - ioctl(IOMMU_VDEVICE_ALLOC)
998  *           of AMD IOMMU, and vRID of a nested Intel VT-d to a Context Table
1013  * struct iommu_ioas_change_process - ioctl(VFIO_IOAS_CHANGE_PROCESS)
1023  * to another, such as during userland live update.
1034  * enum iommu_veventq_flag - flag for struct iommufd_vevent_header
1037 enum iommu_veventq_flag {
1042  * struct iommufd_vevent_header - Virtual Event Header for a vEVENTQ Status
1043  * @flags: Combination of enum iommu_veventq_flag
1049  * +----------------------+-------+----------------------+-------+---+-------+
1051  * +----------------------+-------+----------------------+-------+---+-------+
1055  * 1, it means that delta - 1 number of vEVENTs has lost, e.g. two lost vEVENTs:
1057  * +-----+----------------------+-------+----------------------+-------+-----+
1059  * +-----+----------------------+-------+----------------------+-------+-----+
1065  * +--+----------------------+-------+-----------------------------------------+
1066  * |..| header3 {sequence=3} | data3 | header4 {flags=LOST_EVENTS, sequence=4} |
1067  * +--+----------------------+-------+-----------------------------------------+
1070 	__u32 flags;  member
1075  * enum iommu_veventq_type - Virtual Event Queue Type
1079 enum iommu_veventq_type {
1085  * struct iommu_vevent_arm_smmuv3 - ARM SMMUv3 Virtual Event
1087  * @evt: 256-bit ARM SMMUv3 Event record, little-endian.
1089  *       - 0x04 C_BAD_STE
1090  *       - 0x06 F_STREAM_DISABLED
1091  *       - 0x08 C_BAD_SUBSTREAMID
1092  *       - 0x0a C_BAD_CD
1093  *       - 0x10 F_TRANSLATION
1094  *       - 0x11 F_ADDR_SIZE
1095  *       - 0x12 F_ACCESS
1096  *       - 0x13 F_PERMISSION
1106  * struct iommu_veventq_alloc - ioctl(IOMMU_VEVENTQ_ALLOC)
1108  * @flags: Must be 0
1110  * @type: Type of the vEVENTQ. Must be defined in enum iommu_veventq_type
1124  * a type-specific data structure, in a normal case:
1126  * +-+---------+-------+---------+-------+-----+---------+-------+-+
1128  * +-+---------+-------+---------+-------+-----+---------+-------+-+
1135 	__u32 flags;  member