Lines Matching +full:0 +full:x10000000
153 #define XEN_HYPERCALL_TAG 0XEA1
182 _sxghr_tmp->q = 0; \
184 } while ( 0 )
277 #define _VGCF_online 0
293 #define XEN_DOMCTL_CONFIG_GIC_NATIVE 0
297 #define XEN_DOMCTL_CONFIG_TEE_NONE 0
316 * = 0 => property not present
317 * > 0 => Value of the property
345 #define PSR_IT_MASK (0x0600fc00) /* Thumb If-Then Mask */
350 #define PSR_MODE_USR 0x10
351 #define PSR_MODE_FIQ 0x11
352 #define PSR_MODE_IRQ 0x12
353 #define PSR_MODE_SVC 0x13
354 #define PSR_MODE_MON 0x16
355 #define PSR_MODE_ABT 0x17
356 #define PSR_MODE_HYP 0x1a
357 #define PSR_MODE_UND 0x1b
358 #define PSR_MODE_SYS 0x1f
361 #define PSR_MODE_BIT 0x10 /* Set iff AArch32 */
362 #define PSR_MODE_EL3h 0x0d
363 #define PSR_MODE_EL3t 0x0c
364 #define PSR_MODE_EL2h 0x09
365 #define PSR_MODE_EL2t 0x08
366 #define PSR_MODE_EL1h 0x05
367 #define PSR_MODE_EL1t 0x04
368 #define PSR_MODE_EL0t 0x00
381 #define SCTLR_GUEST_INIT xen_mk_ullong(0x00c50078)
394 #define GUEST_VIRTIO_MMIO_BASE xen_mk_ullong(0x02000000)
395 #define GUEST_VIRTIO_MMIO_SIZE xen_mk_ullong(0x00100000)
403 #define GUEST_GICD_BASE xen_mk_ullong(0x03001000)
404 #define GUEST_GICD_SIZE xen_mk_ullong(0x00001000)
405 #define GUEST_GICC_BASE xen_mk_ullong(0x03002000)
406 #define GUEST_GICC_SIZE xen_mk_ullong(0x00002000)
409 #define GUEST_GICV3_GICD_BASE xen_mk_ullong(0x03001000)
410 #define GUEST_GICV3_GICD_SIZE xen_mk_ullong(0x00010000)
414 #define GUEST_GICV3_GICR0_BASE xen_mk_ullong(0x03020000) /* vCPU0..127 */
415 #define GUEST_GICV3_GICR0_SIZE xen_mk_ullong(0x01000000)
421 #define GUEST_VPCI_ECAM_BASE xen_mk_ullong(0x10000000)
422 #define GUEST_VPCI_ECAM_SIZE xen_mk_ullong(0x10000000)
425 #define GUEST_ACPI_BASE xen_mk_ullong(0x20000000)
426 #define GUEST_ACPI_SIZE xen_mk_ullong(0x02000000)
429 #define GUEST_PL011_BASE xen_mk_ullong(0x22000000)
430 #define GUEST_PL011_SIZE xen_mk_ullong(0x00001000)
433 #define GUEST_VPCI_ADDR_TYPE_MEM xen_mk_ullong(0x02000000)
434 #define GUEST_VPCI_MEM_ADDR xen_mk_ullong(0x23000000)
435 #define GUEST_VPCI_MEM_SIZE xen_mk_ullong(0x10000000)
441 #define GUEST_GNTTAB_BASE xen_mk_ullong(0x38000000)
442 #define GUEST_GNTTAB_SIZE xen_mk_ullong(0x01000000)
444 #define GUEST_MAGIC_BASE xen_mk_ullong(0x39000000)
445 #define GUEST_MAGIC_SIZE xen_mk_ullong(0x01000000)
454 #define GUEST_RAM0_BASE xen_mk_ullong(0x40000000) /* 3GB of low RAM @ 1GB */
455 #define GUEST_RAM0_SIZE xen_mk_ullong(0xc0000000)
458 #define GUEST_VPCI_ADDR_TYPE_PREFETCH_MEM xen_mk_ullong(0x42000000)
459 #define GUEST_VPCI_PREFETCH_MEM_ADDR xen_mk_ullong(0x100000000)
460 #define GUEST_VPCI_PREFETCH_MEM_SIZE xen_mk_ullong(0x100000000)
462 #define GUEST_RAM1_BASE xen_mk_ullong(0x0200000000) /* 1016GB of RAM @ 8GB */
463 #define GUEST_RAM1_SIZE xen_mk_ullong(0xfe00000000)
487 #define PSCI_cpu_suspend 0