Lines Matching +full:0 +full:x400
30 #define FH_MASK_ENABLE 0x80000000
31 #define FH_MASK_INSTANCE 0x7f000000
32 #define FH_MASK_SHM 0x00ff0000
33 #define FH_MASK_INDEX 0x0000ffff
34 #define FH_SHM_VFIO 0x00010000
35 #define FH_SHM_EMUL 0x00020000
36 #define ZPCI_MAX_FID 0xffffffff
37 #define ZPCI_MAX_UID 0xffff
38 #define UID_UNDEFINED 0
39 #define UID_CHECKING_ENABLED 0x01
40 #define ZPCI_DTSM 0x40
50 #define HP_EVENT_TO_CONFIGURED 0x0301
51 #define HP_EVENT_RESERVED_TO_STANDBY 0x0302
52 #define HP_EVENT_DECONFIGURE_REQUEST 0x0303
53 #define HP_EVENT_CONFIGURED_TO_STBRES 0x0304
54 #define HP_EVENT_STANDBY_TO_RESERVED 0x0308
56 #define ERR_EVENT_INVALAS 0x1
57 #define ERR_EVENT_OORANGE 0x2
58 #define ERR_EVENT_INVALTF 0x3
59 #define ERR_EVENT_TPROTE 0x4
60 #define ERR_EVENT_APROTE 0x5
61 #define ERR_EVENT_KEYE 0x6
62 #define ERR_EVENT_INVALTE 0x7
63 #define ERR_EVENT_INVALTL 0x8
64 #define ERR_EVENT_TT 0x9
65 #define ERR_EVENT_INVALMS 0xa
66 #define ERR_EVENT_SERR 0xb
67 #define ERR_EVENT_NOMSI 0x10
68 #define ERR_EVENT_INVALBV 0x11
69 #define ERR_EVENT_AIBV 0x12
70 #define ERR_EVENT_AIRERR 0x13
71 #define ERR_EVENT_FMBA 0x2a
72 #define ERR_EVENT_FMBUP 0x2b
73 #define ERR_EVENT_FMBPRO 0x2c
74 #define ERR_EVENT_CCONF 0x30
75 #define ERR_EVENT_SERVAC 0x3a
76 #define ERR_EVENT_PERMERR 0x3b
78 #define ERR_EVENT_Q_BIT 0x2
82 #define ZPCI_MSI_VEC_MASK 0x7ff
84 #define ZPCI_MSI_ADDR 0xfe00000000000000ULL
85 #define ZPCI_SDMA_ADDR 0x100000000ULL
86 #define ZPCI_EDMA_ADDR 0x1ffffffffffffffULL
88 #define PAGE_DEFAULT_ACC 0
93 ZPCI_IOTA_STO = 0,
102 #define ZPCI_IOTA_IOT_ENABLED 0x800ULL
108 #define ZPCI_IOTA_FS_4K 0
121 #define ZPCI_INDEX_MASK 0x7ffULL
123 #define ZPCI_TABLE_TYPE_MASK 0xc
124 #define ZPCI_TABLE_TYPE_RFX 0xc
125 #define ZPCI_TABLE_TYPE_RSX 0x8
126 #define ZPCI_TABLE_TYPE_RTX 0x4
127 #define ZPCI_TABLE_TYPE_SX 0x0
129 #define ZPCI_TABLE_LEN_RFX 0x3
130 #define ZPCI_TABLE_LEN_RSX 0x3
131 #define ZPCI_TABLE_LEN_RTX 0x3
133 #define ZPCI_TABLE_OFFSET_MASK 0xc0
134 #define ZPCI_TABLE_SIZE 0x4000
144 #define ZPCI_RTE_FLAG_MASK 0x3fffULL
146 #define ZPCI_STE_FLAG_MASK 0x7ffULL
152 #define ZPCI_PTE_VALID_MASK 0x400
153 #define ZPCI_PTE_INVALID 0x400
154 #define ZPCI_PTE_VALID 0x000
155 #define ZPCI_PT_SIZE 0x800
160 #define ZPCI_PTE_FLAG_MASK 0xfffULL
164 #define ZPCI_TABLE_VALID 0x00
165 #define ZPCI_TABLE_INVALID 0x20
166 #define ZPCI_TABLE_PROTECTED 0x200
167 #define ZPCI_TABLE_UNPROTECTED 0x000
168 #define ZPCI_TABLE_FC 0x400
170 #define ZPCI_TABLE_VALID_MASK 0x20
171 #define ZPCI_TABLE_PROT_MASK 0x200
174 #define ZPCI_ETT_ST 0
297 #define UPDATE_U_BIT 0x1ULL
298 #define FMBK_MASK 0xfULL
305 #define ZPCI_FMB_CNT_LD 0
311 #define ZPCI_FMB_FORMAT 0
322 #define ZPCI_DEFAULT_FN_GRP 0xFF
323 #define ZPCI_SIM_GRP_START 0xF0