32  * information (EAS block + EAS index) in the 8 byte data and not END
177  * Notification Descriptor (END) and provides the corresponding
178  * logical interrupt number (END data)
187 #define EAS_END_BLOCK   PPC_BITMASK(4, 7)        /* Destination END block# */
188 #define EAS_END_INDEX   PPC_BITMASK(8, 31)       /* Destination END index */
190 #define EAS_END_DATA    PPC_BITMASK(33, 63)      /* Data written to the END */
224 /* Event Notification Descriptor (END) */
272 #define xive_end_is_valid(end)    (be32_to_cpu((end)->w0) & END_W0_VALID)  argument
273 #define xive_end_is_enqueue(end)  (be32_to_cpu((end)->w0) & END_W0_ENQUEUE)  argument
274 #define xive_end_is_notify(end)   (be32_to_cpu((end)->w0) & END_W0_UCOND_NOTIFY)  argument
275 #define xive_end_is_backlog(end)  (be32_to_cpu((end)->w0) & END_W0_BACKLOG)  argument
276 #define xive_end_is_escalate(end) (be32_to_cpu((end)->w0) & END_W0_ESCALATE_CTL)  argument
277 #define xive_end_is_uncond_escalation(end)              \  argument
278     (be32_to_cpu((end)->w0) & END_W0_UNCOND_ESCALATE)
279 #define xive_end_is_silent_escalation(end)              \  argument
280     (be32_to_cpu((end)->w0) & END_W0_SILENT_ESCALATE)
281 #define xive_end_is_firmware(end)              \  argument
282     (be32_to_cpu((end)->w0) & END_W0_FIRMWARE)
284 static inline uint64_t xive_end_qaddr(XiveEND *end)  in xive_end_qaddr()  argument
286     return ((uint64_t) be32_to_cpu(end->w2) & 0x0fffffff) << 32 |  in xive_end_qaddr()
287         be32_to_cpu(end->w3);  in xive_end_qaddr()
290 void xive_end_pic_print_info(XiveEND *end, uint32_t end_idx, GString *buf);
291 void xive_end_queue_pic_print_info(XiveEND *end, uint32_t width, GString *buf);
292 void xive_end_eas_pic_print_info(XiveEND *end, uint32_t end_idx, GString *buf);
323  * field of the XIVE END