Lines Matching full:1
20 FIELD(ERR_CTRL, SLVERR_ENABLE, 0, 1)
22 FIELD(IR_STATUS, ADDR_DECODE_ERR, 0, 1)
24 FIELD(IR_MASK, ADDR_DECODE_ERR, 0, 1)
26 FIELD(IR_ENABLE, ADDR_DECODE_ERR, 0, 1)
28 FIELD(IR_DISABLE, ADDR_DECODE_ERR, 0, 1)
30 FIELD(WPROT, ACTIVE, 0, 1)
32 FIELD(PLL_CLK_OTHER_DMN, APLL_BYPASS, 0, 1)
38 FIELD(RPLL_CTRL, BYPASS, 3, 1)
39 FIELD(RPLL_CTRL, RESET, 0, 1)
47 FIELD(RPLL_FRAC_CFG, ENABLED, 31, 1)
49 FIELD(RPLL_FRAC_CFG, ALGRTHM, 19, 1)
50 FIELD(RPLL_FRAC_CFG, ORDER, 18, 1)
53 FIELD(PLL_STATUS, RPLL_STABLE, 2, 1)
54 FIELD(PLL_STATUS, RPLL_LOCK, 0, 1)
56 FIELD(RPLL_TO_XPD_CTRL, CLKACT, 25, 1)
59 FIELD(LPD_TOP_SWITCH_CTRL, CLKACT_ADMA, 26, 1)
60 FIELD(LPD_TOP_SWITCH_CTRL, CLKACT, 25, 1)
64 FIELD(LPD_LSBUS_CTRL, CLKACT, 25, 1)
68 FIELD(CPU_R5_CTRL, CLKACT_OCM2, 28, 1)
69 FIELD(CPU_R5_CTRL, CLKACT_OCM, 27, 1)
70 FIELD(CPU_R5_CTRL, CLKACT_CORE, 26, 1)
71 FIELD(CPU_R5_CTRL, CLKACT, 25, 1)
75 FIELD(IOU_SWITCH_CTRL, CLKACT, 25, 1)
79 FIELD(GEM0_REF_CTRL, CLKACT_RX, 27, 1)
80 FIELD(GEM0_REF_CTRL, CLKACT_TX, 26, 1)
81 FIELD(GEM0_REF_CTRL, CLKACT, 25, 1)
85 FIELD(GEM1_REF_CTRL, CLKACT_RX, 27, 1)
86 FIELD(GEM1_REF_CTRL, CLKACT_TX, 26, 1)
87 FIELD(GEM1_REF_CTRL, CLKACT, 25, 1)
91 FIELD(GEM_TSU_REF_CTRL, CLKACT, 25, 1)
95 FIELD(USB0_BUS_REF_CTRL, CLKACT, 25, 1)
99 FIELD(UART0_REF_CTRL, CLKACT, 25, 1)
103 FIELD(UART1_REF_CTRL, CLKACT, 25, 1)
107 FIELD(SPI0_REF_CTRL, CLKACT, 25, 1)
111 FIELD(SPI1_REF_CTRL, CLKACT, 25, 1)
115 FIELD(CAN0_REF_CTRL, CLKACT, 25, 1)
119 FIELD(CAN1_REF_CTRL, CLKACT, 25, 1)
123 FIELD(I2C0_REF_CTRL, CLKACT, 25, 1)
127 FIELD(I2C1_REF_CTRL, CLKACT, 25, 1)
131 FIELD(DBG_LPD_CTRL, CLKACT, 25, 1)
135 FIELD(TIMESTAMP_REF_CTRL, CLKACT, 25, 1)
143 FIELD(DBG_TSTMP_CTRL, CLKACT, 25, 1)
147 FIELD(CPM_TOPSW_REF_CTRL, CLKACT, 25, 1)
151 FIELD(USB3_DUAL_REF_CTRL, CLKACT, 25, 1)
155 FIELD(RST_CPU_R5, RESET_PGE, 4, 1)
156 FIELD(RST_CPU_R5, RESET_AMBA, 2, 1)
157 FIELD(RST_CPU_R5, RESET_CPU1, 1, 1)
158 FIELD(RST_CPU_R5, RESET_CPU0, 0, 1)
160 FIELD(RST_ADMA, RESET, 0, 1)
162 FIELD(RST_GEM0, RESET, 0, 1)
164 FIELD(RST_GEM1, RESET, 0, 1)
166 FIELD(RST_SPARE, RESET, 0, 1)
168 FIELD(RST_USB0, RESET, 0, 1)
170 FIELD(RST_UART0, RESET, 0, 1)
172 FIELD(RST_UART1, RESET, 0, 1)
174 FIELD(RST_SPI0, RESET, 0, 1)
176 FIELD(RST_SPI1, RESET, 0, 1)
178 FIELD(RST_CAN0, RESET, 0, 1)
180 FIELD(RST_CAN1, RESET, 0, 1)
182 FIELD(RST_I2C0, RESET, 0, 1)
184 FIELD(RST_I2C1, RESET, 0, 1)
186 FIELD(RST_DBG_LPD, RPU_DBG1_RESET, 5, 1)
187 FIELD(RST_DBG_LPD, RPU_DBG0_RESET, 4, 1)
188 FIELD(RST_DBG_LPD, RESET_HSDP, 1, 1)
189 FIELD(RST_DBG_LPD, RESET, 0, 1)
191 FIELD(RST_GPIO, RESET, 0, 1)
193 FIELD(RST_TTC, TTC3_RESET, 3, 1)
194 FIELD(RST_TTC, TTC2_RESET, 2, 1)
195 FIELD(RST_TTC, TTC1_RESET, 1, 1)
196 FIELD(RST_TTC, TTC0_RESET, 0, 1)
198 FIELD(RST_TIMESTAMP, RESET, 0, 1)
200 FIELD(RST_SWDT, RESET, 0, 1)
202 FIELD(RST_OCM, RESET, 0, 1)
204 FIELD(RST_IPI, RESET, 0, 1)
206 FIELD(RST_SYSMON, SEQ_RST, 1, 1)
207 FIELD(RST_SYSMON, CFG_RST, 0, 1)
209 FIELD(RST_FPD, SRST, 1, 1)
210 FIELD(RST_FPD, POR, 0, 1)
212 FIELD(PSM_RST_MODE, WAKEUP, 2, 1)
215 #define CRL_R_MAX (R_PSM_RST_MODE + 1)