Lines Matching defs:Stm32l4x5RccState

182 struct Stm32l4x5RccState {  struct
183     SysBusDevice parent_obj;
185     MemoryRegion mmio;
187     uint32_t cr;
188     uint32_t icscr;
189     uint32_t cfgr;
190     uint32_t pllcfgr;
191     uint32_t pllsai1cfgr;
192     uint32_t pllsai2cfgr;
193     uint32_t cier;
194     uint32_t cifr;
195     uint32_t ahb1rstr;
196     uint32_t ahb2rstr;
197     uint32_t ahb3rstr;
198     uint32_t apb1rstr1;
199     uint32_t apb1rstr2;
200     uint32_t apb2rstr;
201     uint32_t ahb1enr;
202     uint32_t ahb2enr;
203     uint32_t ahb3enr;
204     uint32_t apb1enr1;
205     uint32_t apb1enr2;
206     uint32_t apb2enr;
207     uint32_t ahb1smenr;
208     uint32_t ahb2smenr;
209     uint32_t ahb3smenr;
210     uint32_t apb1smenr1;
211     uint32_t apb1smenr2;
212     uint32_t apb2smenr;
213     uint32_t ccipr;
214     uint32_t bdcr;
215     uint32_t csr;
218     Clock *gnd;
219     Clock *hsi16_rc;
220     Clock *msi_rc;
221     Clock *hse;
222     Clock *lsi_rc;
223     Clock *lse_crystal;
224     Clock *sai1_extclk;
225     Clock *sai2_extclk;
228     RccPllState plls[RCC_NUM_PLL];
231     RccClockMuxState clock_muxes[RCC_NUM_CLOCK_MUX];
233     qemu_irq irq;
234     uint64_t hse_frequency;
235     uint64_t sai1_extclk_frequency;
236     uint64_t sai2_extclk_frequency;