hw/misc/aspeed_scu.h

9  * the COPYING file in the top-level directory.
19 #define TYPE_ASPEED_2400_SCU TYPE_ASPEED_SCU "-ast2400"
20 #define TYPE_ASPEED_2500_SCU TYPE_ASPEED_SCU "-ast2500"
21 #define TYPE_ASPEED_2600_SCU TYPE_ASPEED_SCU "-ast2600"
22 #define TYPE_ASPEED_2700_SCU TYPE_ASPEED_SCU "-ast2700"
23 #define TYPE_ASPEED_2700_SCUIO TYPE_ASPEED_SCU "io" "-ast2700"
24 #define TYPE_ASPEED_1030_SCU TYPE_ASPEED_SCU "-ast1030"
86  *    arch/arm/mach-aspeed/include/mach/regs-scu.h
88  *    Copyright (C) 2012-2020  ASPEED Technology Inc.
101  *  31     Enable Video Engine clock dynamic slow down
104  *  26     2D Engine GCLK clock throttling enable
107  *  19     LPC Host LHCLK clock generation/output enable control
109  *  15     SD/SDIO clock running enable
113  *  7      ARM CPU/AHB clock slow down enable
117  *  0      CPU/AHB clock dynamic slow down enable (defined in bit[6:4])
122  * SCU24   H-PLL Parameter Register (for Aspeed AST2400 SOC)
124  *  18     H-PLL parameter selection
125  *           0: Select H-PLL by strapping resistors
126  *           1: Select H-PLL by the programmed registers (SCU24[17:0])
127  *  17     Enable H-PLL bypass mode
128  *  16     Turn off H-PLL
129  *  10:5   H-PLL Numerator
130  *  4      H-PLL Output Divider
131  *  3:0    H-PLL Denumerator
133  *  (Output frequency) = 24MHz * (2-OD) * [(Numerator+2) / (Denumerator+1)]
141  * SCU24   H-PLL Parameter Register (for Aspeed AST2500 SOC)
143  *  21     Enable H-PLL reset
144  *  20     Enable H-PLL bypass mode
145  *  19     Turn off H-PLL
146  *  18:13  H-PLL Post Divider
147  *  12:5   H-PLL Numerator (M)
148  *  4:0    H-PLL Denumerator (N)
164  * 23     Enable 25 MHz reference clock input
165  * 22     Enable GPIOE pass-through mode
166  * 21     Enable GPIOD pass-through mode
170  * 17     Enable BMC 2nd boot watchdog timer
173  * 14     Enable LPC dedicated reset pin function
176  * 9:8    H-PLL default clock frequency selection
179  * 5      Enable VGA BIOS ROM
265  * 31     Enable SPI Flash Strap Auto Fetch Mode
266  * 30     Enable GPIO Strap Mode
269  * 27     Enable fast reset mode for ARM ICE debugger
270  * 26     Enable eSPI flash mode
271  * 25     Enable eSPI mode
274  * 22     Enable GPIOE pass-through mode
275  * 21     Enable GPIOD pass-through mode
277  * 19     Enable ACPI function
279  * 17     Enable BMC 2nd boot watchdog timer
288  * 5      Enable dedicated VGA BIOS ROM
337  * SCU200   H-PLL Parameter Register (for Aspeed AST2600 SOC)
339  *  28:26  H-PLL Parameters
340  *  25     Enable H-PLL reset
341  *  24     Enable H-PLL bypass mode
342  *  23     Turn off H-PLL
343  *  22:19  H-PLL Post Divider (P)
344  *  18:13  H-PLL Numerator (M)
345  *  12:0   H-PLL Denumerator (N)
366  *  15     LHCLK clock generation/output enable control