Lines Matching +full:mis +full:- +full:matched
18 * <http://www.gnu.org/licenses/gpl-2.0.html>
23 #include "hw/qdev-core.h"
24 #include "disas/dis-asm.h"
29 #include "exec/mmu-access-type.h"
30 #include "exec/tlb-common.h"
31 #include "qapi/qapi-types-machine.h"
32 #include "qapi/qapi-types-run-state.h"
45 * @section_id: QEMU-cpu
62 * has a cached value for the class in cs->cc which is set up in
75 * This macro is typically used in "cpu-qom.h" header file, and will:
77 * - create the typedefs for the CPU object and class structs
78 * - register the type for use with g_autoptr
79 * - provide three standard type cast functions
92 /* see accel/tcg/tb-jmp-cache.h */
95 /* see accel-cpu.h */
98 /* see sysemu-cpu-ops.h */
103 * @class_by_name: Callback to map -cpu command line model name to an
111 * Fill in target specific information for the "query-cpus-fast"
113 * @get_arch_id: Callback for getting architecture-dependent CPU ID.
129 * breakpoint. Used by AVR to handle a gdb mis-feature with
144 * @adjust_watchpoint_address: Perform a target-specific adjustment to an
188 * class data that depends on the accelerator, see accel/accel-common.c.
193 * Keep non-pointer data at the end to minimize holes.
217 * - in the lower TARGET_PAGE_BITS, a physical section number
218 * - with the lower TARGET_PAGE_BITS masked off, an offset which
245 * Additional tlb flags for use by the slow path. If non-zero,
251 * Allow target-specific additions to this structure.
260 * Otherwise, pte_attrs is the same as the MAIR_EL1 8-bit format.
262 * of the VMSAv8-64 PTEs.
280 * we must flush the entire tlb. The region is matched if
336 * High 16 bits: Set to -1 to force TCG to stop executing linked TBs
337 * for this CPU and return to its top level loop (even in non-icount mode).
338 * This allows a single read-compare-cbranch-write sequence to test
357 * @can_do_io: True if memory-mapped IO is allowed.
401 #define CPU_UNSET_NUMA_NODE_ID -1
404 * struct CPUState - common state of one CPU core or thread.
410 * be the same as the cluster-id property of the CPU object's TYPE_CPU_CLUSTER
414 * @tcg_cflags: Pre-computed cflags for this cpu.
430 * @singlestep_enabled: Flags for single-stepping.
447 * @plugin_state: per-CPU plugin state
453 * @kvm_fetch_index: Keeps the index that we last fetched from the per-vCPU
487 /* Should CPU start in powered-off state? */
542 /* Use by accel-block: CPU is executing an ioctl() */
571 /* Used for user-only emulation of prctl(PR_SET_UNALIGN). */
580 char neg_align[-sizeof(CPUNegativeOffsetState) % 16] QEMU_ALIGNED(16);
586 sizeof(CPUState) - sizeof(CPUNegativeOffsetState));
590 /* We validate that CPUArchState follows CPUState in cpu-target.c */ in cpu_env()
690 * @f: If non-null, dump to this stream, else to current print sink.
707 * Returns: Corresponding physical page address or -1 if no page found.
720 * Returns: Corresponding physical page address or -1 if no page found.
738 * is currently big-endian.
807 * @cpu_option: The -cpu option including optional parameters.
900 return cpu->exclusive_context_count; in cpu_in_exclusive_context()
915 * @id: Guest-exposed CPU ID to lookup.
919 * Returns: %true - CPU is found, %false - CPU isn't found.
925 * @id: Guest-exposed CPU ID of the CPU to obtain.
952 cpu->cc->set_pc(cpu, addr); in cpu_set_pc()
997 * free_queued_cpu_work() - free all items on CPU work queue
1003 * process_queued_cpu_work() - process all items on CPU work queue
1062 * Enables or disables single-stepping for @cpu.
1091 if (unlikely(!QTAILQ_EMPTY(&cpu->breakpoints))) { in cpu_breakpoint_test()
1092 QTAILQ_FOREACH(bp, &cpu->breakpoints, entry) { in cpu_breakpoint_test()
1093 if (bp->pc == pc && (bp->flags & mask)) { in cpu_breakpoint_test()
1126 #define UNASSIGNED_CPU_INDEX -1
1127 #define UNASSIGNED_CLUSTER_INDEX -1