hw/arm/omap.h

4  * Copyright (C) 2006-2008 Andrzej Zaborowski  <balrog@zabor.org>
9  * (at your option) version 3 of the License.
24 #include "target/arm/cpu-qom.h"
62 #define TYPE_OMAP_INTC "omap-intc"
94 #define TYPE_OMAP1_GPIO "omap-gpio"
104  * See /usr/include/asm-arm/arch-omap/irqs.h in Linux.
107 #define OMAP_INT_FIQ               3
130  * Common OMAP-15xx IRQ numbers for level 1 interrupt handler
137  * OMAP-1510 specific IRQ numbers for level 1 interrupt handler
145  * OMAP-310 specific IRQ numbers for level 1 interrupt handler
153  * OMAP-1610 specific IRQ numbers for level 1 interrupt handler
167  * OMAP-730 specific IRQ numbers for level 1 interrupt handler
172 #define OMAP_INT_730_USB_ISO       3
193 #define OMAP_INT_uWireRX       3
213  * OMAP-1510 specific IRQ numbers for level 2 interrupt handler
222  * OMAP-310 specific IRQ numbers for level 2 interrupt handler
233  * OMAP-1610 specific IRQ numbers for level 2 interrupt handler
272  * OMAP-730 specific IRQ numbers for level 2 interrupt handler
277 #define OMAP_INT_730_CFIREQ            3
352 /* Only used in OMAP DMA 3.x gigacells */
370 /* Only used in OMAP DMA 3.x gigacells */
419  * See /usr/include/asm-arm/arch-omap/dma.h in Linux.
424 #define OMAP_DMA_I2C_RX            3
532 #define TYPE_OMAP_MMC "omap-mmc"
545 #define cpu_is_omap310(cpu)        (cpu->mpu_model == omap310)
546 #define cpu_is_omap1510(cpu)       (cpu->mpu_model == omap1510)
547 #define cpu_is_omap1610(cpu)       (cpu->mpu_model == omap1610)
548 #define cpu_is_omap1710(cpu)       (cpu->mpu_model == omap1710)
585         uint32_t (*read[3])(struct omap_mpu_state_s *s,
587         void (*write[3])(struct omap_mpu_state_s *s,
596     /* MPUI-TIPB peripherals */
597     struct omap_uart_s *uart[3];
621     struct omap_lpg_s *led[2];  member
628     struct omap_mpu_timer_s *timer[3];
652     struct dpll_ctl_s *dpll[3];
692         qemu_log_mask(LOG_GUEST_ERROR, "%s: Read-only register %#08" \