hw/arm/omap.h

4  * Copyright (C) 2006-2008 Andrzej Zaborowski  <balrog@zabor.org>
24 #include "target/arm/cpu-qom.h"
47 /* omap_clk.c */
61 /* omap_intc.c */
62 #define TYPE_OMAP_INTC "omap-intc"
84 /* omap_i2c.c */
93 /* omap_gpio.c */
94 #define TYPE_OMAP1_GPIO "omap-gpio"
104  * See /usr/include/asm-arm/arch-omap/irqs.h in Linux.
119 #define OMAP_INT_DMA_CH3           22
130  * Common OMAP-15xx IRQ numbers for level 1 interrupt handler
137  * OMAP-1510 specific IRQ numbers for level 1 interrupt handler
145  * OMAP-310 specific IRQ numbers for level 1 interrupt handler
153  * OMAP-1610 specific IRQ numbers for level 1 interrupt handler
167  * OMAP-730 specific IRQ numbers for level 1 interrupt handler
205 #define OMAP_INT_OS_TIMER      22
213  * OMAP-1510 specific IRQ numbers for level 2 interrupt handler
222  * OMAP-310 specific IRQ numbers for level 2 interrupt handler
233  * OMAP-1610 specific IRQ numbers for level 2 interrupt handler
272  * OMAP-730 specific IRQ numbers for level 2 interrupt handler
296 #define OMAP_INT_730_TIMER32K          22
329 /* omap_dma.c */
419  * See /usr/include/asm-arm/arch-omap/dma.h in Linux.
443 #define OMAP_DMA_MMC_RX            22
522 /* omap_lcdc.c */
531 /* omap_mmc.c */
532 #define TYPE_OMAP_MMC "omap-mmc"
542 /* omap_i2c.c */
545 #define cpu_is_omap310(cpu)        (cpu->mpu_model == omap310)
546 #define cpu_is_omap1510(cpu)       (cpu->mpu_model == omap1510)
547 #define cpu_is_omap1610(cpu)       (cpu->mpu_model == omap1610)
548 #define cpu_is_omap1710(cpu)       (cpu->mpu_model == omap1710)
596     /* MPUI-TIPB peripherals */
672 /* omap1.c */
692         qemu_log_mask(LOG_GUEST_ERROR, "%s: Read-only register %#08" \