Lines Matching +full:64 +full:- +full:bit
4 /* 32-bit ELF base types. */
11 /* 64-bit ELF base types. */
47 #define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code. */
48 #define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code. */
49 #define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code. */
50 #define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code. */
51 #define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code. */
61 #define EF_MIPS_ABI_O64 0x00002000 /* O32 extended for 64 bit. */
81 #define EF_MIPS_MACH_SB1 0x008a0000 /* Broadcom SB-1 */
89 #define EF_MIPS_MACH_9000 0x00990000 /* PMC-Sierra RM9000 */
95 #define MIPS_ABI_FP_UNKNOWN (-1) /* Unknown FP ABI (internal) */
98 #define MIPS_ABI_FP_DOUBLE 0x1 /* -mdouble-float */
99 #define MIPS_ABI_FP_SINGLE 0x2 /* -msingle-float */
100 #define MIPS_ABI_FP_SOFT 0x3 /* -msoft-float */
101 #define MIPS_ABI_FP_OLD_64 0x4 /* -mips32r2 -mfp64 */
102 #define MIPS_ABI_FP_XX 0x5 /* -mfpxx */
103 #define MIPS_ABI_FP_64 0x6 /* -mips32r2 -mfp64 */
104 #define MIPS_ABI_FP_64A 0x7 /* -mips32r2 -mfp64 -mno-odd-spreg */
108 uint8_t isa_level; /* The level of the ISA: 1-5, 32, 64 */
110 /* - 0 for MIPS V and below, */
111 /* - 1-n otherwise. */
113 uint8_t cpr1_size; /* The size of co-processor 1 registers */
114 uint8_t cpr2_size; /* The size of co-processor 2 registers */
115 uint8_t fp_abi; /* The floating-point ABI */
116 uint32_t isa_ext; /* Mask of processor-specific extensions */
141 #define EM_MIPS 8 /* MIPS R3000 (officially, big-endian only) */
143 #define EM_MIPS_RS4_BE 10 /* MIPS R4000 big-endian */
156 #define EM_SPARCV9 43 /* SPARC v9 64-bit */
160 #define EM_IA_64 50 /* HP/Intel IA-64 */
162 #define EM_X86_64 62 /* AMD x86-64 */
166 #define EM_CRIS 76 /* Axis Communications 32-bit embedded processor */
168 #define EM_AVR 83 /* AVR 8-bit microcontroller */
182 #define EM_RISCV 243 /* RISC-V */
202 #define EM_ALTERA_NIOS2 113 /* Altera Nios II soft-core processor */
333 #define AT_SECURE 23 /* boolean, was exec suid-like? */
341 #define AT_L1D_CACHESHAPE 35 /* bits 0-3: cache associativity. */
342 #define AT_L2_CACHESHAPE 36 /* bits 4-7: log2 of line size. */
367 #define ELF64_R_TYPE_DATA(i) (((ELF64_R_TYPE(i) >> 8) ^ 0x00800000) - 0x00800000)
510 #define HWCAP_ARM_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
706 #define R_ALPHA_REFLONG 1 /* Direct 32 bit */
707 #define R_ALPHA_REFQUAD 2 /* Direct 64 bit */
708 #define R_ALPHA_GPREL32 3 /* GP relative 32 bit */
709 #define R_ALPHA_LITERAL 4 /* GP relative 16 bit w/optimization */
712 #define R_ALPHA_BRADDR 7 /* PC+4 relative 23 bit shifted */
713 #define R_ALPHA_HINT 8 /* PC+4 relative 16 bit shifted */
714 #define R_ALPHA_SREL16 9 /* PC relative 16 bit */
715 #define R_ALPHA_SREL32 10 /* PC relative 32 bit */
716 #define R_ALPHA_SREL64 11 /* PC relative 64 bit */
717 #define R_ALPHA_GPRELHIGH 17 /* GP relative 32 bit, high 16 bits */
718 #define R_ALPHA_GPRELLOW 18 /* GP relative 32 bit, low 16 bits */
719 #define R_ALPHA_GPREL16 19 /* GP relative 16 bit */
749 #define R_PPC_ADDR32 1 /* 32bit absolute address */
750 #define R_PPC_ADDR24 2 /* 26bit address, 2 bits ignored. */
751 #define R_PPC_ADDR16 3 /* 16bit absolute address */
752 #define R_PPC_ADDR16_LO 4 /* lower 16bit of absolute address */
753 #define R_PPC_ADDR16_HI 5 /* high 16bit of absolute address */
754 #define R_PPC_ADDR16_HA 6 /* adjusted high 16bit */
755 #define R_PPC_ADDR14 7 /* 16bit address, 2 bits ignored */
758 #define R_PPC_REL24 10 /* PC relative 26 bit */
759 #define R_PPC_REL14 11 /* PC relative 16 bit */
799 #define EF_ALIGN8 0x40 /* 8-bit structure alignment is in use */
806 /* Other constants defined in the ARM ELF spec. version B-01. */
827 /* ARM-specific values for sh_flags */
832 /* ARM-specific program header flags */
838 #define R_ARM_PC24 1 /* PC relative 26 bit branch */
839 #define R_ARM_ABS32 2 /* Direct 32 bit */
840 #define R_ARM_REL32 3 /* PC relative 32 bit */
842 #define R_ARM_ABS16 5 /* Direct 16 bit */
843 #define R_ARM_ABS12 6 /* Direct 12 bit */
845 #define R_ARM_ABS8 8 /* Direct 8 bit */
858 #define R_ARM_GOTOFF 24 /* 32 bit offset to GOT */
859 #define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */
860 #define R_ARM_GOT32 26 /* 32 bit GOT entry */
861 #define R_ARM_PLT32 27 /* 32 bit PLT address */
900 /* relocs to generate 19, 21, and 33 bit PC-relative addresses */
911 /* relocs for control-flow - all offsets as multiple of 4 */
916 /* group relocs to create pc-relative offset inline */
924 /* group relocs to create a GOT-relative offset inline */
932 /* GOT-relative data relocs */
935 /* GOT-relative instr relocs */
1007 #define R_390_8 1 /* Direct 8 bit. */
1008 #define R_390_12 2 /* Direct 12 bit. */
1009 #define R_390_16 3 /* Direct 16 bit. */
1010 #define R_390_32 4 /* Direct 32 bit. */
1011 #define R_390_PC32 5 /* PC relative 32 bit. */
1012 #define R_390_GOT12 6 /* 12 bit GOT offset. */
1013 #define R_390_GOT32 7 /* 32 bit GOT offset. */
1014 #define R_390_PLT32 8 /* 32 bit PC relative PLT address. */
1019 #define R_390_GOTOFF32 13 /* 32 bit offset to GOT. */
1020 #define R_390_GOTPC 14 /* 32 bit PC rel. offset to GOT. */
1021 #define R_390_GOT16 15 /* 16 bit GOT offset. */
1022 #define R_390_PC16 16 /* PC relative 16 bit. */
1023 #define R_390_PC16DBL 17 /* PC relative 16 bit shifted by 1. */
1024 #define R_390_PLT16DBL 18 /* 16 bit PC rel. PLT shifted by 1. */
1025 #define R_390_PC32DBL 19 /* PC relative 32 bit shifted by 1. */
1026 #define R_390_PLT32DBL 20 /* 32 bit PC rel. PLT shifted by 1. */
1027 #define R_390_GOTPCDBL 21 /* 32 bit PC rel. GOT shifted by 1. */
1028 #define R_390_64 22 /* Direct 64 bit. */
1029 #define R_390_PC64 23 /* PC relative 64 bit. */
1030 #define R_390_GOT64 24 /* 64 bit GOT offset. */
1031 #define R_390_PLT64 25 /* 64 bit PC relative PLT address. */
1032 #define R_390_GOTENT 26 /* 32 bit PC rel. to GOT entry >> 1. */
1033 #define R_390_GOTOFF16 27 /* 16 bit offset to GOT. */
1034 #define R_390_GOTOFF64 28 /* 64 bit offset to GOT. */
1035 #define R_390_GOTPLT12 29 /* 12 bit offset to jump slot. */
1036 #define R_390_GOTPLT16 30 /* 16 bit offset to jump slot. */
1037 #define R_390_GOTPLT32 31 /* 32 bit offset to jump slot. */
1038 #define R_390_GOTPLT64 32 /* 64 bit offset to jump slot. */
1039 #define R_390_GOTPLTENT 33 /* 32 bit rel. offset to jump slot. */
1040 #define R_390_PLTOFF16 34 /* 16 bit offset from GOT to PLT. */
1041 #define R_390_PLTOFF32 35 /* 32 bit offset from GOT to PLT. */
1042 #define R_390_PLTOFF64 36 /* 16 bit offset from GOT to PLT. */
1048 #define R_390_TLS_GD32 40 /* Direct 32 bit for general dynamic
1050 #define R_390_TLS_GD64 41 /* Direct 64 bit for general dynamic
1052 #define R_390_TLS_GOTIE12 42 /* 12 bit GOT offset for static TLS
1054 #define R_390_TLS_GOTIE32 43 /* 32 bit GOT offset for static TLS
1056 #define R_390_TLS_GOTIE64 44 /* 64 bit GOT offset for static TLS
1058 #define R_390_TLS_LDM32 45 /* Direct 32 bit for local dynamic
1060 #define R_390_TLS_LDM64 46 /* Direct 64 bit for local dynamic
1062 #define R_390_TLS_IE32 47 /* 32 bit address of GOT entry for
1064 #define R_390_TLS_IE64 48 /* 64 bit address of GOT entry for
1066 #define R_390_TLS_IEENT 49 /* 32 bit rel. offset to GOT entry for
1068 #define R_390_TLS_LE32 50 /* 32 bit negated offset relative to
1070 #define R_390_TLS_LE64 51 /* 64 bit negated offset relative to
1072 #define R_390_TLS_LDO32 52 /* 32 bit offset relative to TLS
1074 #define R_390_TLS_LDO64 53 /* 64 bit offset relative to TLS
1084 /* x86-64 relocation types */
1086 #define R_X86_64_64 1 /* Direct 64 bit */
1087 #define R_X86_64_PC32 2 /* PC relative 32 bit signed */
1088 #define R_X86_64_GOT32 3 /* 32 bit GOT entry */
1089 #define R_X86_64_PLT32 4 /* 32 bit PLT address */
1094 #define R_X86_64_GOTPCREL 9 /* 32 bit signed pc relative
1096 #define R_X86_64_32 10 /* Direct 32 bit zero extended */
1097 #define R_X86_64_32S 11 /* Direct 32 bit sign extended */
1098 #define R_X86_64_16 12 /* Direct 16 bit zero extended */
1099 #define R_X86_64_PC16 13 /* 16 bit sign extended pc relative */
1100 #define R_X86_64_8 14 /* Direct 8 bit sign extended */
1101 #define R_X86_64_PC8 15 /* 8 bit sign extended pc relative */
1124 #define EFA_PARISC_1_0 0x020b /* PA-RISC 1.0 big-endian. */
1125 #define EFA_PARISC_1_1 0x0210 /* PA-RISC 1.1 big-endian. */
1126 #define EFA_PARISC_2_0 0x0214 /* PA-RISC 2.0 big-endian. */
1156 #define R_PARISC_DIR32 1 /* Direct 32-bit reference. */
1161 #define R_PARISC_PCREL32 9 /* 32-bit rel. address. */
1168 #define R_PARISC_GPREL21L 26 /* GP-relative, left 21 bits. */
1169 #define R_PARISC_GPREL14R 30 /* GP-relative, right 14 bits. */
1170 #define R_PARISC_LTOFF21L 34 /* LT-relative, left 21 bits. */
1171 #define R_PARISC_LTOFF14R 38 /* LT-relative, right 14 bits. */
1177 #define R_PARISC_LTOFF_FPTR32 57 /* 32 bits LT-rel. function pointer. */
1178 #define R_PARISC_LTOFF_FPTR21L 58 /* LT-rel. fct ptr, left 21 bits. */
1179 #define R_PARISC_LTOFF_FPTR14R 62 /* LT-rel. fct ptr, right 14 bits. */
1180 #define R_PARISC_FPTR64 64 /* 64 bits function address. */
1182 #define R_PARISC_PCREL64 72 /* 64 bits PC-rel. address. */
1183 #define R_PARISC_PCREL22F 74 /* 22 bits PC-rel. address. */
1184 #define R_PARISC_PCREL14WR 75 /* PC-rel. address, right 14 bits. */
1186 #define R_PARISC_PCREL16F 77 /* 16 bits PC-rel. address. */
1187 #define R_PARISC_PCREL16WF 78 /* 16 bits PC-rel. address. */
1188 #define R_PARISC_PCREL16DF 79 /* 16 bits PC-rel. address. */
1189 #define R_PARISC_DIR64 80 /* 64 bits of eff. address. */
1195 #define R_PARISC_GPREL64 88 /* 64 bits of GP-rel. address. */
1196 #define R_PARISC_GPREL14WR 91 /* GP-rel. address, right 14 bits. */
1197 #define R_PARISC_GPREL14DR 92 /* GP-rel. address, right 14 bits. */
1198 #define R_PARISC_GPREL16F 93 /* 16 bits GP-rel. address. */
1199 #define R_PARISC_GPREL16WF 94 /* 16 bits GP-rel. address. */
1200 #define R_PARISC_GPREL16DF 95 /* 16 bits GP-rel. address. */
1201 #define R_PARISC_LTOFF64 96 /* 64 bits LT-rel. address. */
1202 #define R_PARISC_LTOFF14WR 99 /* LT-rel. address, right 14 bits. */
1203 #define R_PARISC_LTOFF14DR 100 /* LT-rel. address, right 14 bits. */
1204 #define R_PARISC_LTOFF16F 101 /* 16 bits LT-rel. address. */
1205 #define R_PARISC_LTOFF16WF 102 /* 16 bits LT-rel. address. */
1206 #define R_PARISC_LTOFF16DF 103 /* 16 bits LT-rel. address. */
1207 #define R_PARISC_SECREL64 104 /* 64 bits section rel. address. */
1208 #define R_PARISC_SEGREL64 112 /* 64 bits segment rel. address. */
1209 #define R_PARISC_PLTOFF14WR 115 /* PLT-rel. address, right 14 bits. */
1210 #define R_PARISC_PLTOFF14DR 116 /* PLT-rel. address, right 14 bits. */
1211 #define R_PARISC_PLTOFF16F 117 /* 16 bits LT-rel. address. */
1212 #define R_PARISC_PLTOFF16WF 118 /* 16 bits PLT-rel. address. */
1213 #define R_PARISC_PLTOFF16DF 119 /* 16 bits PLT-rel. address. */
1214 #define R_PARISC_LTOFF_FPTR64 120 /* 64 bits LT-rel. function ptr. */
1215 #define R_PARISC_LTOFF_FPTR14WR 123 /* LT-rel. fct. ptr., right 14 bits. */
1216 #define R_PARISC_LTOFF_FPTR14DR 124 /* LT-rel. fct. ptr., right 14 bits. */
1217 #define R_PARISC_LTOFF_FPTR16F 125 /* 16 bits LT-rel. function ptr. */
1218 #define R_PARISC_LTOFF_FPTR16WF 126 /* 16 bits LT-rel. function ptr. */
1219 #define R_PARISC_LTOFF_FPTR16DF 127 /* 16 bits LT-rel. function ptr. */
1224 #define R_PARISC_TPREL32 153 /* 32 bits TP-rel. address. */
1225 #define R_PARISC_TPREL21L 154 /* TP-rel. address, left 21 bits. */
1226 #define R_PARISC_TPREL14R 158 /* TP-rel. address, right 14 bits. */
1227 #define R_PARISC_LTOFF_TP21L 162 /* LT-TP-rel. address, left 21 bits. */
1228 #define R_PARISC_LTOFF_TP14R 166 /* LT-TP-rel. address, right 14 bits.*/
1229 #define R_PARISC_LTOFF_TP14F 167 /* 14 bits LT-TP-rel. address. */
1230 #define R_PARISC_TPREL64 216 /* 64 bits TP-rel. address. */
1231 #define R_PARISC_TPREL14WR 219 /* TP-rel. address, right 14 bits. */
1232 #define R_PARISC_TPREL14DR 220 /* TP-rel. address, right 14 bits. */
1233 #define R_PARISC_TPREL16F 221 /* 16 bits TP-rel. address. */
1234 #define R_PARISC_TPREL16WF 222 /* 16 bits TP-rel. address. */
1235 #define R_PARISC_TPREL16DF 223 /* 16 bits TP-rel. address. */
1236 #define R_PARISC_LTOFF_TP64 224 /* 64 bits LT-TP-rel. address. */
1237 #define R_PARISC_LTOFF_TP14WR 227 /* LT-TP-rel. address, right 14 bits.*/
1238 #define R_PARISC_LTOFF_TP14DR 228 /* LT-TP-rel. address, right 14 bits.*/
1239 #define R_PARISC_LTOFF_TP16F 229 /* 16 bits LT-TP-rel. address. */
1240 #define R_PARISC_LTOFF_TP16WF 230 /* 16 bits LT-TP-rel. address. */
1241 #define R_PARISC_LTOFF_TP16DF 231 /* 16 bits LT-TP-rel. address. */
1277 /* IA-64 specific declarations. */
1280 #define EF_IA_64_MASKOS 0x0000000f /* os-specific flags */
1281 #define EF_IA_64_ABI64 0x00000010 /* 64-bit ABI */
1303 /* IA-64 relocations. */
1359 #define R_IA64_PCREL21BI 0x79 /* @pcrel(sym + add), 21bit inst */
1360 #define R_IA64_PCREL22 0x7a /* @pcrel(sym + add), 22bit inst */
1361 #define R_IA64_PCREL64I 0x7b /* @pcrel(sym + add), 64bit inst */
1386 /* RISC-V relocations. */
1441 /* RISC-V ELF Flags. */
1639 #define ELFOSABI_HPUX 1 /* HP-UX */
1685 #define NT_S390_VXRS_HIGH 0x30a /* s390 vector registers 16-31 */
1686 #define NT_S390_VXRS_LOW 0x309 /* s390 vector registers 0-15 (lower half) */
1723 * 32bit entry point into the kernel. When requested to launch the
1724 * guest kernel, use this entry point to launch the guest in 32-bit