641                                 int status, uint32_t *int_mask)  in uhci_handle_td_error()  argument
677         *int_mask |= 0x01;  in uhci_handle_td_error()
684                             uint32_t *int_mask)  in uhci_complete_td()  argument
698                                     async->packet.status, int_mask);  in uhci_complete_td()
711         *int_mask |= 0x01;  in uhci_complete_td()
717             *int_mask |= 0x02;  in uhci_complete_td()
732                           UHCI_TD *td, uint32_t td_addr, uint32_t *int_mask)  in uhci_handle_td()  argument
774                 *int_mask |= 0x01;  in uhci_handle_td()
830                                         int_mask);  in uhci_handle_td()
875     ret = uhci_complete_td(s, td, async, int_mask);  in uhci_handle_td()
943     uint32_t int_mask = 0;  in uhci_queue_fill()  local
957         ret = uhci_handle_td(q->uhci, q, q->qh_addr, &ptd, plink, &int_mask);  in uhci_queue_fill()
962         assert(int_mask == 0);  in uhci_queue_fill()
970     uint32_t frame_addr, link, old_td_ctrl, val, int_mask;  in uhci_process_frame()  local
982     int_mask = 0;  in uhci_process_frame()
1040         ret = uhci_handle_td(s, NULL, curr_qh, &td, link, &int_mask);  in uhci_process_frame()
1090     s->pending_int_mask |= int_mask;  in uhci_process_frame()