Lines Matching refs:pci_conf
37 uint8_t *pci_conf = dev->config; in usb_ehci_pci_realize() local
39 pci_set_byte(&pci_conf[PCI_CLASS_PROG], 0x20); in usb_ehci_pci_realize()
42 pci_set_byte(&pci_conf[PCI_CAPABILITY_LIST], 0x00); in usb_ehci_pci_realize()
45 pci_set_byte(&pci_conf[PCI_INTERRUPT_PIN], 4); /* interrupt pin D */ in usb_ehci_pci_realize()
46 pci_set_byte(&pci_conf[PCI_MIN_GNT], 0); in usb_ehci_pci_realize()
47 pci_set_byte(&pci_conf[PCI_MAX_LAT], 0); in usb_ehci_pci_realize()
51 pci_set_byte(&pci_conf[USB_SBRN], USB_RELEASE_2); /* release # (2.1.4) */ in usb_ehci_pci_realize()
52 pci_set_byte(&pci_conf[0x61], 0x20); /* frame length adjustment (2.1.5) */ in usb_ehci_pci_realize()
53 pci_set_word(&pci_conf[0x62], 0x00); /* port wake up capability (2.1.6) */ in usb_ehci_pci_realize()
55 pci_conf[0x64] = 0x00; in usb_ehci_pci_realize()
56 pci_conf[0x65] = 0x00; in usb_ehci_pci_realize()
57 pci_conf[0x66] = 0x00; in usb_ehci_pci_realize()
58 pci_conf[0x67] = 0x00; in usb_ehci_pci_realize()
59 pci_conf[0x68] = 0x01; in usb_ehci_pci_realize()
60 pci_conf[0x69] = 0x00; in usb_ehci_pci_realize()
61 pci_conf[0x6a] = 0x00; in usb_ehci_pci_realize()
62 pci_conf[0x6b] = 0x00; /* USBLEGSUP */ in usb_ehci_pci_realize()
63 pci_conf[0x6c] = 0x00; in usb_ehci_pci_realize()
64 pci_conf[0x6d] = 0x00; in usb_ehci_pci_realize()
65 pci_conf[0x6e] = 0x00; in usb_ehci_pci_realize()
66 pci_conf[0x6f] = 0xc0; /* USBLEFCTLSTS */ in usb_ehci_pci_realize()