Lines Matching +full:en +full:- +full:us
14 * the Arm SSE-123 Example Subsystem Technical Reference Manual:
17 * The system counter is a non-stop 64-bit up-counter. It provides
21 * 88-bit precision (64.24 fixed point), with a programmable scale factor.
34 #include "hw/timer/sse-counter.h"
38 #include "hw/qdev-clock.h"
43 FIELD(CNTCR, EN, 0, 1)
50 * Although CNTCR defines interrupt-related bits, the counter doesn't
106 notifier_list_notify(&s->notifier_list, NULL); in sse_counter_notify_users()
111 return (s->cntcr & R_CNTCR_EN_MASK) != 0; in sse_counter_enabled()
120 tick -= s->ticks_then; in sse_counter_tick_to_time()
122 if (s->cntcr & R_CNTCR_SCEN_MASK) { in sse_counter_tick_to_time()
124 tick = muldiv64(tick, 0x01000000, s->cntscr0); in sse_counter_tick_to_time()
127 return s->ns_then + clock_ticks_to_ns(s->clk, tick); in sse_counter_tick_to_time()
134 * which consume us last for the life of the simulation, in sse_counter_register_consumer()
137 notifier_list_add(&s->notifier_list, notifier); in sse_counter_register_consumer()
147 return s->ticks_then; in sse_counter_for_timestamp()
150 ticks = clock_ns_to_ticks(s->clk, now - s->ns_then); in sse_counter_for_timestamp()
151 if (s->cntcr & R_CNTCR_SCEN_MASK) { in sse_counter_for_timestamp()
154 * the underlying 88-bit counter for every tick of the in sse_counter_for_timestamp()
156 * 88-bit value. Multiplying the tick count by CNTSCR tells us in sse_counter_for_timestamp()
157 * how much the full 88-bit counter has moved on; we then in sse_counter_for_timestamp()
158 * divide that by 0x01000000 to find out how much the 64-bit in sse_counter_for_timestamp()
159 * visible portion has advanced. muldiv64() gives us the in sse_counter_for_timestamp()
160 * necessary at-least-88-bit precision for the intermediate in sse_counter_for_timestamp()
163 ticks = muldiv64(ticks, s->cntscr0, 0x01000000); in sse_counter_for_timestamp()
165 return s->ticks_then + ticks; in sse_counter_for_timestamp()
177 * Write one 32-bit half of the counter value; startbit is the in sse_write_cntcv()
178 * bit position of this half in the 64-bit word, either 0 or 32. in sse_write_cntcv()
184 s->ticks_then = cntcv; in sse_write_cntcv()
185 s->ns_then = now; in sse_write_cntcv()
197 r = s->cntcr; in sse_counter_control_read()
202 * halted via the Halt-on-Debug signal. We don't implement halting in sse_counter_control_read()
216 * - CNTSCR can only be written when CNTCR.EN == 0 in sse_counter_control_read()
217 * - HWCLKSW=0, so selected clock is always CLK0 in sse_counter_control_read()
218 * - counter scaling is implemented in sse_counter_control_read()
224 r = s->cntscr0; in sse_counter_control_read()
231 r = control_id[(offset - A_PID4) / 4]; in sse_counter_control_read()
255 * Although CNTCR defines interrupt-related bits, the counter doesn't in sse_counter_control_write()
265 if ((value ^ s->cntcr) & R_CNTCR_EN_MASK) { in sse_counter_control_write()
272 s->ticks_then = sse_counter_for_timestamp(s, now); in sse_counter_control_write()
273 s->ns_then = now; in sse_counter_control_write()
276 s->cntcr = value; in sse_counter_control_write()
289 * anything here but only do it on a write to CNTCR.EN. in sse_counter_control_write()
291 s->cntscr0 = value; in sse_counter_control_write()
325 r = status_id[(offset - A_PID4) / 4]; in sse_counter_status_read()
382 s->cntcr = 0; in sse_counter_reset()
383 s->cntscr0 = 0x01000000; in sse_counter_reset()
384 s->ns_then = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); in sse_counter_reset()
385 s->ticks_then = 0; in sse_counter_reset()
402 s->ticks_then = sse_counter_for_timestamp(s, now); in sse_clk_callback()
403 s->ns_then = now; in sse_clk_callback()
419 notifier_list_init(&s->notifier_list); in sse_counter_init()
421 s->clk = qdev_init_clock_in(DEVICE(obj), "CLK", sse_clk_callback, s, in sse_counter_init()
423 memory_region_init_io(&s->control_mr, obj, &sse_counter_control_ops, in sse_counter_init()
424 s, "sse-counter-control", 0x1000); in sse_counter_init()
425 memory_region_init_io(&s->status_mr, obj, &sse_counter_status_ops, in sse_counter_init()
426 s, "sse-counter-status", 0x1000); in sse_counter_init()
427 sysbus_init_mmio(sbd, &s->control_mr); in sse_counter_init()
428 sysbus_init_mmio(sbd, &s->status_mr); in sse_counter_init()
435 if (!clock_has_source(s->clk)) { in sse_counter_realize()
442 .name = "sse-counter",
455 dc->realize = sse_counter_realize; in sse_counter_class_init()
456 dc->vmsd = &sse_counter_vmstate; in sse_counter_class_init()