Lines Matching +full:pwm +full:- +full:number
2 * SiFive PWM
31 #include "hw/qdev-properties.h"
72 return muldiv64(time, s->freq_hz, NANOSECONDS_PER_SECOND); in sifive_pwm_ns_to_ticks()
78 return muldiv64(ticks, NANOSECONDS_PER_SECOND, s->freq_hz); in sifive_pwm_ticks_to_ns()
83 return s->pwmcfg & R_CONFIG_SCALE_MASK; in sifive_pwm_compute_scale()
90 if (HAS_PWM_EN_BITS(s->pwmcfg)) { in sifive_pwm_set_alarms()
92 * Subtract ticks from number of ticks when the timer was zero in sifive_pwm_set_alarms()
95 uint64_t pwmcount = (sifive_pwm_ns_to_ticks(s, now_ns) - in sifive_pwm_set_alarms()
96 s->tick_offset) & PWMCOUNT_MASK; in sifive_pwm_set_alarms()
102 uint64_t pwmcmp = s->pwmcmp[i] & PWMCMP_MASK; in sifive_pwm_set_alarms()
110 uint64_t offset = pwmcmp_ticks - pwmcount + 1; in sifive_pwm_set_alarms()
115 timer_mod(&s->timer[i], when_to_fire); in sifive_pwm_set_alarms()
119 timer_mod(&s->timer[i], now_ns + 1); in sifive_pwm_set_alarms()
128 uint64_t pwmcount = (s->tick_offset) & PWMCOUNT_MASK; in sifive_pwm_set_alarms()
133 uint64_t pwmcmp = s->pwmcmp[i] & PWMCMP_MASK; in sifive_pwm_set_alarms()
137 timer_mod(&s->timer[i], now_ns + 1); in sifive_pwm_set_alarms()
141 timer_mod(&s->timer[i], 0xFFFFFFFFFFFFFF); in sifive_pwm_set_alarms()
151 bool was_incrementing = HAS_PWM_EN_BITS(s->pwmcfg); in sifive_pwm_interrupt()
155 s->pwmcfg |= R_CONFIG_CMP0IP_MASK << num; in sifive_pwm_interrupt()
156 qemu_irq_raise(s->irqs[num]); in sifive_pwm_interrupt()
162 if ((s->pwmcfg & R_CONFIG_ZEROCMP_MASK) && (num == 0)) { in sifive_pwm_interrupt()
164 s->pwmcfg &= ~R_CONFIG_ENONESHOT_MASK; in sifive_pwm_interrupt()
168 s->tick_offset = now; in sifive_pwm_interrupt()
171 s->tick_offset = 0; in sifive_pwm_interrupt()
180 ((now & PWMCOUNT_MASK) < (s->tick_offset & PWMCOUNT_MASK))) { in sifive_pwm_interrupt()
181 s->pwmcfg &= ~R_CONFIG_ENONESHOT_MASK; in sifive_pwm_interrupt()
188 if (was_incrementing && !HAS_PWM_EN_BITS(s->pwmcfg)) { in sifive_pwm_interrupt()
189 s->tick_offset = (now - s->tick_offset) & PWMCOUNT_MASK; in sifive_pwm_interrupt()
233 return s->pwmcfg; in sifive_pwm_read()
235 cur_time = s->tick_offset; in sifive_pwm_read()
237 if (HAS_PWM_EN_BITS(s->pwmcfg)) { in sifive_pwm_read()
238 cur_time = now - cur_time; in sifive_pwm_read()
247 cur_time = s->tick_offset; in sifive_pwm_read()
250 if (HAS_PWM_EN_BITS(s->pwmcfg)) { in sifive_pwm_read()
251 cur_time = now - cur_time; in sifive_pwm_read()
256 return s->pwmcmp[0] & PWMCMP_MASK; in sifive_pwm_read()
258 return s->pwmcmp[1] & PWMCMP_MASK; in sifive_pwm_read()
260 return s->pwmcmp[2] & PWMCMP_MASK; in sifive_pwm_read()
262 return s->pwmcmp[3] & PWMCMP_MASK; in sifive_pwm_read()
304 qemu_irq_lower(s->irqs[0]); in sifive_pwm_write()
308 qemu_irq_lower(s->irqs[1]); in sifive_pwm_write()
312 qemu_irq_lower(s->irqs[2]); in sifive_pwm_write()
316 qemu_irq_lower(s->irqs[3]); in sifive_pwm_write()
321 * set the time when pwmcount was zero to be cur_time - pwmcount. in sifive_pwm_write()
326 if ((!HAS_PWM_EN_BITS(s->pwmcfg) && HAS_PWM_EN_BITS(value)) || in sifive_pwm_write()
327 (HAS_PWM_EN_BITS(s->pwmcfg) && !HAS_PWM_EN_BITS(value))) { in sifive_pwm_write()
328 s->tick_offset = (now - s->tick_offset) & PWMCOUNT_MASK; in sifive_pwm_write()
331 s->pwmcfg = value; in sifive_pwm_write()
337 if (HAS_PWM_EN_BITS(s->pwmcfg)) { in sifive_pwm_write()
338 new_offset = now - new_offset; in sifive_pwm_write()
341 s->tick_offset = new_offset; in sifive_pwm_write()
347 if (HAS_PWM_EN_BITS(s->pwmcfg)) { in sifive_pwm_write()
348 new_offset = now - new_offset; in sifive_pwm_write()
351 s->tick_offset = new_offset; in sifive_pwm_write()
354 s->pwmcmp[0] = value & PWMCMP_MASK; in sifive_pwm_write()
357 s->pwmcmp[1] = value & PWMCMP_MASK; in sifive_pwm_write()
360 s->pwmcmp[2] = value & PWMCMP_MASK; in sifive_pwm_write()
363 s->pwmcmp[3] = value & PWMCMP_MASK; in sifive_pwm_write()
379 s->pwmcfg = 0x00000000; in sifive_pwm_reset()
380 s->pwmcmp[0] = 0x00000000; in sifive_pwm_reset()
381 s->pwmcmp[1] = 0x00000000; in sifive_pwm_reset()
382 s->pwmcmp[2] = 0x00000000; in sifive_pwm_reset()
383 s->pwmcmp[3] = 0x00000000; in sifive_pwm_reset()
385 s->tick_offset = sifive_pwm_ns_to_ticks(s, now); in sifive_pwm_reset()
409 DEFINE_PROP_UINT64("clock-frequency", struct SiFivePwmState,
419 sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irqs[i]); in sifive_pwm_init()
422 memory_region_init_io(&s->mmio, obj, &sifive_pwm_ops, s, in sifive_pwm_init()
424 sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); in sifive_pwm_init()
431 timer_init_ns(&s->timer[0], QEMU_CLOCK_VIRTUAL, in sifive_pwm_realize()
434 timer_init_ns(&s->timer[1], QEMU_CLOCK_VIRTUAL, in sifive_pwm_realize()
437 timer_init_ns(&s->timer[2], QEMU_CLOCK_VIRTUAL, in sifive_pwm_realize()
440 timer_init_ns(&s->timer[3], QEMU_CLOCK_VIRTUAL, in sifive_pwm_realize()
450 dc->vmsd = &vmstate_sifive_pwm; in sifive_pwm_class_init()
451 dc->realize = sifive_pwm_realize; in sifive_pwm_class_init()