41 #define DB_PRINT(...) do { \  macro
46     #define DB_PRINT(...)  macro
147         DB_PRINT("irq_change of state %u ISR:%x IER:%X\n",  in xlx_spi_update_irq()
184         DB_PRINT("data tx:%x\n", tx);  in spi_flush_txfifo()
186         DB_PRINT("data rx:%x\n", rx);  in spi_flush_txfifo()
217             DB_PRINT("Read from empty FIFO!\n");  in spi_read()
239     DB_PRINT("addr=" HWADDR_FMT_plx " = %x\n", addr * 4, r);  in spi_read()
251     DB_PRINT("addr=" HWADDR_FMT_plx " = %x\n", addr, value);  in spi_write()
256             DB_PRINT("Invalid write to SRR %x\n", value);  in spi_write()
271             DB_PRINT("DTR and master enabled\n");  in spi_write()
277         DB_PRINT("Invalid write to SPISR %x\n", value);  in spi_write()
344     DB_PRINT("\n");  in xilinx_spi_realize()