Lines Matching +full:0 +full:x10000000
75 #define KERNEL_LOAD_ADDR 0x00004000
76 #define CMDLINE_ADDR 0x007ff000
77 #define INITRD_LOAD_ADDR 0x00800000
79 #define PROM_VADDR 0xffd00000
81 #define CFG_ADDR 0xd00000510ULL
82 #define FW_CFG_SUN4M_DEPTH (FW_CFG_ARCH_LOCAL + 0x00)
83 #define FW_CFG_SUN4M_WIDTH (FW_CFG_ARCH_LOCAL + 0x01)
84 #define FW_CFG_SUN4M_HEIGHT (FW_CFG_ARCH_LOCAL + 0x02)
132 for (size_t i = 0; i < ARRAY_SIZE(fw_cfg_arch_wellknown_keys); i++) { in DECLARE_CLASS_CHECKERS()
143 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); in fw_cfg_boot_set()
154 uint8_t image[0x1ff0]; in nvram_init()
157 memset(image, '\0', sizeof(image)); in nvram_init()
160 sysp_end = chrp_nvram_create_system_partition(image, 0, 0x1fd0); in nvram_init()
163 chrp_nvram_create_free_partition(&image[sysp_end], 0x1fd0 - sysp_end); in nvram_init()
165 Sun_init_header((struct Sun_nvram *)&image[0x1fd8], macaddr, in nvram_init()
168 for (i = 0; i < sizeof(image); i++) { in nvram_init()
178 cs->halted = 0; in cpu_kick_irq()
220 return addr - 0xf0000000ULL; in translate_kernel_address()
235 kernel_size = 0; in sun4m_load_kernel()
240 ELFDATA2MSB, EM_SPARC, 0, 0); in sun4m_load_kernel()
241 if (kernel_size < 0) in sun4m_load_kernel()
245 if (kernel_size < 0) in sun4m_load_kernel()
249 if (kernel_size < 0) { in sun4m_load_kernel()
255 *initrd_size = 0; in sun4m_load_kernel()
260 if ((int)*initrd_size < 0) { in sun4m_load_kernel()
266 if (*initrd_size > 0) { in sun4m_load_kernel()
267 for (i = 0; i < 64 * TARGET_PAGE_SIZE; i += TARGET_PAGE_SIZE) { in sun4m_load_kernel()
269 if (ptr && ldl_p(ptr) == 0x48647253) { /* HdrS */ in sun4m_load_kernel()
289 sysbus_connect_irq(s, 0, irq); in iommu_init()
290 sysbus_mmio_map(s, 0, addr); in iommu_init()
329 sysbus_connect_irq(SYS_BUS_DEVICE(espdma), 0, espdma_irq); in sparc32_dma_init()
331 sysbus_connect_irq(SYS_BUS_DEVICE(ledma), 0, ledma_irq); in sparc32_dma_init()
333 sysbus_mmio_map(SYS_BUS_DEVICE(dma), 0, dma_base); in sparc32_dma_init()
335 sysbus_mmio_map(SYS_BUS_DEVICE(esp), 0, esp_base); in sparc32_dma_init()
338 sysbus_mmio_map(SYS_BUS_DEVICE(lance), 0, le_base); in sparc32_dma_init()
356 for (i = 0; i < MAX_CPUS; i++) { in slavio_intctl_init()
357 for (j = 0; j < MAX_PILS; j++) { in slavio_intctl_init()
361 sysbus_mmio_map(s, 0, addrg); in slavio_intctl_init()
362 for (i = 0; i < MAX_CPUS; i++) { in slavio_intctl_init()
369 #define SYS_TIMER_OFFSET 0x10000ULL
370 #define CPU_TIMER_OFFSET(cpu) (0x1000ULL * cpu)
383 sysbus_connect_irq(s, 0, master_irq); in slavio_timer_init_all()
384 sysbus_mmio_map(s, 0, addr + SYS_TIMER_OFFSET); in slavio_timer_init_all()
386 for (i = 0; i < MAX_CPUS; i++) { in slavio_timer_init_all()
403 #define MISC_LEDS 0x01600000
404 #define MISC_CFG 0x01800000
405 #define MISC_DIAG 0x01a00000
406 #define MISC_MDM 0x01b00000
407 #define MISC_SYS 0x01f00000
423 sysbus_mmio_map(s, 0, base + MISC_CFG); in slavio_misc_init()
443 sysbus_connect_irq(s, 0, irq); in slavio_misc_init()
445 slavio_system_powerdown = qdev_get_gpio_in(dev, 0); in slavio_misc_init()
458 sysbus_connect_irq(s, 0, irq); in ecc_init()
459 sysbus_mmio_map(s, 0, base); in ecc_init()
460 if (version == 0) { // SS-600MP only in ecc_init()
461 sysbus_mmio_map(s, 1, base + 0x1000); in ecc_init()
474 sysbus_mmio_map(s, 0, power_base); in apc_init()
475 sysbus_connect_irq(s, 0, cpu_halt); in apc_init()
493 sysbus_mmio_map(s, 0, addr); in tcx_init()
495 sysbus_mmio_map(s, 1, addr + 0x04000000ULL); in tcx_init()
497 sysbus_mmio_map(s, 2, addr + 0x06000000ULL); in tcx_init()
499 sysbus_mmio_map(s, 3, addr + 0x0c000000ULL); in tcx_init()
501 sysbus_mmio_map(s, 4, addr + 0x0e000000ULL); in tcx_init()
503 sysbus_mmio_map(s, 5, addr + 0x00700000ULL); in tcx_init()
505 sysbus_mmio_map(s, 6, addr + 0x00200000ULL); in tcx_init()
508 sysbus_mmio_map(s, 7, addr + 0x00300000ULL); in tcx_init()
510 sysbus_mmio_map(s, 7, addr + 0x00301000ULL); in tcx_init()
513 sysbus_mmio_map(s, 8, addr + 0x00240000ULL); in tcx_init()
515 sysbus_mmio_map(s, 9, addr + 0x00280000ULL); in tcx_init()
516 /* 0/DFB8 : 8-bit plane */ in tcx_init()
517 sysbus_mmio_map(s, 10, addr + 0x00800000ULL); in tcx_init()
519 sysbus_mmio_map(s, 11, addr + 0x02000000ULL); in tcx_init()
521 sysbus_mmio_map(s, 12, addr + 0x0a000000ULL); in tcx_init()
524 sysbus_mmio_map(s, 13, addr + 0x00301000ULL); in tcx_init()
527 sysbus_connect_irq(s, 0, irq); in tcx_init()
545 sysbus_mmio_map(s, 0, addr); in cg3_init()
547 sysbus_mmio_map(s, 1, addr + 0x400000ULL); in cg3_init()
549 sysbus_mmio_map(s, 2, addr + 0x800000ULL); in cg3_init()
551 sysbus_connect_irq(s, 0, irq); in cg3_init()
558 static const uint8_t idreg_data[] = { 0xfe, 0x81, 0x01, 0x03 };
569 sysbus_mmio_map(s, 0, addr); in idreg_init()
631 sysbus_mmio_map(s, 0, addr); in afx_init()
691 sysbus_mmio_map(s, 0, addr); in prom_init()
701 NULL, NULL, NULL, ELFDATA2MSB, EM_SPARC, 0, 0); in prom_init()
702 if (ret < 0 || ret > PROM_SIZE_MAX) { in prom_init()
709 if (ret < 0 || ret > PROM_SIZE_MAX) { in prom_init()
799 object_property_set_bool(OBJECT(cpu), "start-powered-off", id != 0, in cpu_devinit()
838 for(i = 0; i < smp_cpus; i++) { in sun4m_hw_init()
849 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0); in sun4m_hw_init()
860 hwdef->intctl_base + 0x10000ULL, in sun4m_hw_init()
863 for (i = 0; i < 32; i++) { in sun4m_hw_init()
866 for (i = 0; i < MAX_CPUS; i++) { in sun4m_hw_init()
912 cg3_init(hwdef->tcx_base, slavio_irq[11], 0x00100000, in sun4m_hw_init()
928 tcx_init(hwdef->tcx_base, slavio_irq[11], 0x00100000, in sun4m_hw_init()
934 for (i = 0; i < MAX_VSIMMS; i++) { in sun4m_hw_init()
938 empty_slot_init(name, hwdef->vsimm[i].reg_base, 0x2000); in sun4m_hw_init()
944 create_unimplemented_device("sun-sx", hwdef->sx_base, 0x2000); in sun4m_hw_init()
951 sysbus_connect_irq(s, 0, slavio_irq[0]); in sun4m_hw_init()
952 sysbus_mmio_map(s, 0, hwdef->nvram_base); in sun4m_hw_init()
958 Slavio TTYB (base+0, Linux ttyS1) is the second QEMU serial device */ in sun4m_hw_init()
969 sysbus_mmio_map(s, 0, hwdef->ms_kb_base); in sun4m_hw_init()
975 sysbus_connect_irq(s, 0, qdev_get_gpio_in(ms_kb_orgate, 0)); in sun4m_hw_init()
977 qdev_connect_gpio_out(ms_kb_orgate, 0, slavio_irq[14]); in sun4m_hw_init()
980 qdev_prop_set_uint32(dev, "disabled", 0); in sun4m_hw_init()
984 qdev_prop_set_chr(dev, "chrA", serial_hd(0)); in sun4m_hw_init()
990 sysbus_mmio_map(s, 0, hwdef->serial_base); in sun4m_hw_init()
997 sysbus_connect_irq(s, 0, qdev_get_gpio_in(serial_orgate, 0)); in sun4m_hw_init()
999 qdev_connect_gpio_out(serial_orgate, 0, slavio_irq[15]); in sun4m_hw_init()
1002 apc_init(hwdef->apc_base, qemu_allocate_irq(cpu_halt_signal, NULL, 0)); in sun4m_hw_init()
1007 memset(fd, 0, sizeof(fd)); in sun4m_hw_init()
1008 fd[0] = drive_get(IF_FLOPPY, 0, 0); in sun4m_hw_init()
1012 fdc_tc = qemu_allocate_irq(dummy_fdc_tc, NULL, 0); in sun4m_hw_init()
1027 hwdef->dbri_base + 0x1000, 0x30); in sun4m_hw_init()
1030 hwdef->dbri_base + 0x10000, 0x100); in sun4m_hw_init()
1035 create_unimplemented_device("sun-bpp", hwdef->bpp_base, 0x20); in sun4m_hw_init()
1038 initrd_size = 0; in sun4m_hw_init()
1060 sysbus_mmio_map(s, 0, CFG_ADDR); in sun4m_hw_init()
1080 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0); in sun4m_hw_init()
1081 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, 0); in sun4m_hw_init()
1085 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, machine->boot_config.order[0]); in sun4m_hw_init()
1117 .iommu_base = 0x10000000, in ss5_class_init()
1118 .iommu_pad_base = 0x10004000, in ss5_class_init()
1119 .iommu_pad_len = 0x0fffb000, in ss5_class_init()
1120 .tcx_base = 0x50000000, in ss5_class_init()
1121 .cs_base = 0x6c000000, in ss5_class_init()
1122 .slavio_base = 0x70000000, in ss5_class_init()
1123 .ms_kb_base = 0x71000000, in ss5_class_init()
1124 .serial_base = 0x71100000, in ss5_class_init()
1125 .nvram_base = 0x71200000, in ss5_class_init()
1126 .fd_base = 0x71400000, in ss5_class_init()
1127 .counter_base = 0x71d00000, in ss5_class_init()
1128 .intctl_base = 0x71e00000, in ss5_class_init()
1129 .idreg_base = 0x78000000, in ss5_class_init()
1130 .dma_base = 0x78400000, in ss5_class_init()
1131 .esp_base = 0x78800000, in ss5_class_init()
1132 .le_base = 0x78c00000, in ss5_class_init()
1133 .apc_base = 0x6a000000, in ss5_class_init()
1134 .afx_base = 0x6e000000, in ss5_class_init()
1135 .aux1_base = 0x71900000, in ss5_class_init()
1136 .aux2_base = 0x71910000, in ss5_class_init()
1137 .nvram_machine_id = 0x80, in ss5_class_init()
1139 .iommu_version = 0x05000000, in ss5_class_init()
1140 .max_mem = 0x10000000, in ss5_class_init()
1154 .iommu_base = 0xfe0000000ULL, in ss10_class_init()
1155 .tcx_base = 0xe20000000ULL, in ss10_class_init()
1156 .slavio_base = 0xff0000000ULL, in ss10_class_init()
1157 .ms_kb_base = 0xff1000000ULL, in ss10_class_init()
1158 .serial_base = 0xff1100000ULL, in ss10_class_init()
1159 .nvram_base = 0xff1200000ULL, in ss10_class_init()
1160 .fd_base = 0xff1700000ULL, in ss10_class_init()
1161 .counter_base = 0xff1300000ULL, in ss10_class_init()
1162 .intctl_base = 0xff1400000ULL, in ss10_class_init()
1163 .idreg_base = 0xef0000000ULL, in ss10_class_init()
1164 .dma_base = 0xef0400000ULL, in ss10_class_init()
1165 .esp_base = 0xef0800000ULL, in ss10_class_init()
1166 .le_base = 0xef0c00000ULL, in ss10_class_init()
1167 .apc_base = 0xefa000000ULL, /* XXX should not exist */ in ss10_class_init()
1168 .aux1_base = 0xff1800000ULL, in ss10_class_init()
1169 .aux2_base = 0xff1a01000ULL, in ss10_class_init()
1170 .ecc_base = 0xf00000000ULL, in ss10_class_init()
1171 .ecc_version = 0x10000000, /* version 0, implementation 1 */ in ss10_class_init()
1172 .nvram_machine_id = 0x72, in ss10_class_init()
1174 .iommu_version = 0x03000000, in ss10_class_init()
1175 .max_mem = 0xf00000000ULL, in ss10_class_init()
1189 .iommu_base = 0xfe0000000ULL, in ss600mp_class_init()
1190 .tcx_base = 0xe20000000ULL, in ss600mp_class_init()
1191 .slavio_base = 0xff0000000ULL, in ss600mp_class_init()
1192 .ms_kb_base = 0xff1000000ULL, in ss600mp_class_init()
1193 .serial_base = 0xff1100000ULL, in ss600mp_class_init()
1194 .nvram_base = 0xff1200000ULL, in ss600mp_class_init()
1195 .counter_base = 0xff1300000ULL, in ss600mp_class_init()
1196 .intctl_base = 0xff1400000ULL, in ss600mp_class_init()
1197 .dma_base = 0xef0081000ULL, in ss600mp_class_init()
1198 .esp_base = 0xef0080000ULL, in ss600mp_class_init()
1199 .le_base = 0xef0060000ULL, in ss600mp_class_init()
1200 .apc_base = 0xefa000000ULL, /* XXX should not exist */ in ss600mp_class_init()
1201 .aux1_base = 0xff1800000ULL, in ss600mp_class_init()
1202 .aux2_base = 0xff1a01000ULL, /* XXX should not exist */ in ss600mp_class_init()
1203 .ecc_base = 0xf00000000ULL, in ss600mp_class_init()
1204 .ecc_version = 0x00000000, /* version 0, implementation 0 */ in ss600mp_class_init()
1205 .nvram_machine_id = 0x71, in ss600mp_class_init()
1207 .iommu_version = 0x01000000, in ss600mp_class_init()
1208 .max_mem = 0xf00000000ULL, in ss600mp_class_init()
1222 .iommu_base = 0xfe0000000ULL, in ss20_class_init()
1223 .tcx_base = 0xe20000000ULL, in ss20_class_init()
1224 .slavio_base = 0xff0000000ULL, in ss20_class_init()
1225 .ms_kb_base = 0xff1000000ULL, in ss20_class_init()
1226 .serial_base = 0xff1100000ULL, in ss20_class_init()
1227 .nvram_base = 0xff1200000ULL, in ss20_class_init()
1228 .fd_base = 0xff1700000ULL, in ss20_class_init()
1229 .counter_base = 0xff1300000ULL, in ss20_class_init()
1230 .intctl_base = 0xff1400000ULL, in ss20_class_init()
1231 .idreg_base = 0xef0000000ULL, in ss20_class_init()
1232 .dma_base = 0xef0400000ULL, in ss20_class_init()
1233 .esp_base = 0xef0800000ULL, in ss20_class_init()
1234 .le_base = 0xef0c00000ULL, in ss20_class_init()
1235 .bpp_base = 0xef4800000ULL, in ss20_class_init()
1236 .apc_base = 0xefa000000ULL, /* XXX should not exist */ in ss20_class_init()
1237 .aux1_base = 0xff1800000ULL, in ss20_class_init()
1238 .aux2_base = 0xff1a01000ULL, in ss20_class_init()
1239 .dbri_base = 0xee0000000ULL, in ss20_class_init()
1240 .sx_base = 0xf80000000ULL, in ss20_class_init()
1243 .reg_base = 0x9c000000ULL, in ss20_class_init()
1244 .vram_base = 0xfc000000ULL in ss20_class_init()
1246 .reg_base = 0x90000000ULL, in ss20_class_init()
1247 .vram_base = 0xf0000000ULL in ss20_class_init()
1249 .reg_base = 0x94000000ULL in ss20_class_init()
1251 .reg_base = 0x98000000ULL in ss20_class_init()
1254 .ecc_base = 0xf00000000ULL, in ss20_class_init()
1255 .ecc_version = 0x20000000, /* version 0, implementation 2 */ in ss20_class_init()
1256 .nvram_machine_id = 0x72, in ss20_class_init()
1258 .iommu_version = 0x13000000, in ss20_class_init()
1259 .max_mem = 0xf00000000ULL, in ss20_class_init()
1273 .iommu_base = 0x10000000, in voyager_class_init()
1274 .tcx_base = 0x50000000, in voyager_class_init()
1275 .slavio_base = 0x70000000, in voyager_class_init()
1276 .ms_kb_base = 0x71000000, in voyager_class_init()
1277 .serial_base = 0x71100000, in voyager_class_init()
1278 .nvram_base = 0x71200000, in voyager_class_init()
1279 .fd_base = 0x71400000, in voyager_class_init()
1280 .counter_base = 0x71d00000, in voyager_class_init()
1281 .intctl_base = 0x71e00000, in voyager_class_init()
1282 .idreg_base = 0x78000000, in voyager_class_init()
1283 .dma_base = 0x78400000, in voyager_class_init()
1284 .esp_base = 0x78800000, in voyager_class_init()
1285 .le_base = 0x78c00000, in voyager_class_init()
1286 .apc_base = 0x71300000, /* pmc */ in voyager_class_init()
1287 .aux1_base = 0x71900000, in voyager_class_init()
1288 .aux2_base = 0x71910000, in voyager_class_init()
1289 .nvram_machine_id = 0x80, in voyager_class_init()
1291 .iommu_version = 0x05000000, in voyager_class_init()
1292 .max_mem = 0x10000000, in voyager_class_init()
1305 .iommu_base = 0x10000000, in ss_lx_class_init()
1306 .iommu_pad_base = 0x10004000, in ss_lx_class_init()
1307 .iommu_pad_len = 0x0fffb000, in ss_lx_class_init()
1308 .tcx_base = 0x50000000, in ss_lx_class_init()
1309 .slavio_base = 0x70000000, in ss_lx_class_init()
1310 .ms_kb_base = 0x71000000, in ss_lx_class_init()
1311 .serial_base = 0x71100000, in ss_lx_class_init()
1312 .nvram_base = 0x71200000, in ss_lx_class_init()
1313 .fd_base = 0x71400000, in ss_lx_class_init()
1314 .counter_base = 0x71d00000, in ss_lx_class_init()
1315 .intctl_base = 0x71e00000, in ss_lx_class_init()
1316 .idreg_base = 0x78000000, in ss_lx_class_init()
1317 .dma_base = 0x78400000, in ss_lx_class_init()
1318 .esp_base = 0x78800000, in ss_lx_class_init()
1319 .le_base = 0x78c00000, in ss_lx_class_init()
1320 .aux1_base = 0x71900000, in ss_lx_class_init()
1321 .aux2_base = 0x71910000, in ss_lx_class_init()
1322 .nvram_machine_id = 0x80, in ss_lx_class_init()
1324 .iommu_version = 0x04000000, in ss_lx_class_init()
1325 .max_mem = 0x10000000, in ss_lx_class_init()
1338 .iommu_base = 0x10000000, in ss4_class_init()
1339 .tcx_base = 0x50000000, in ss4_class_init()
1340 .cs_base = 0x6c000000, in ss4_class_init()
1341 .slavio_base = 0x70000000, in ss4_class_init()
1342 .ms_kb_base = 0x71000000, in ss4_class_init()
1343 .serial_base = 0x71100000, in ss4_class_init()
1344 .nvram_base = 0x71200000, in ss4_class_init()
1345 .fd_base = 0x71400000, in ss4_class_init()
1346 .counter_base = 0x71d00000, in ss4_class_init()
1347 .intctl_base = 0x71e00000, in ss4_class_init()
1348 .idreg_base = 0x78000000, in ss4_class_init()
1349 .dma_base = 0x78400000, in ss4_class_init()
1350 .esp_base = 0x78800000, in ss4_class_init()
1351 .le_base = 0x78c00000, in ss4_class_init()
1352 .apc_base = 0x6a000000, in ss4_class_init()
1353 .aux1_base = 0x71900000, in ss4_class_init()
1354 .aux2_base = 0x71910000, in ss4_class_init()
1355 .nvram_machine_id = 0x80, in ss4_class_init()
1357 .iommu_version = 0x05000000, in ss4_class_init()
1358 .max_mem = 0x10000000, in ss4_class_init()
1371 .iommu_base = 0x10000000, in scls_class_init()
1372 .tcx_base = 0x50000000, in scls_class_init()
1373 .slavio_base = 0x70000000, in scls_class_init()
1374 .ms_kb_base = 0x71000000, in scls_class_init()
1375 .serial_base = 0x71100000, in scls_class_init()
1376 .nvram_base = 0x71200000, in scls_class_init()
1377 .fd_base = 0x71400000, in scls_class_init()
1378 .counter_base = 0x71d00000, in scls_class_init()
1379 .intctl_base = 0x71e00000, in scls_class_init()
1380 .idreg_base = 0x78000000, in scls_class_init()
1381 .dma_base = 0x78400000, in scls_class_init()
1382 .esp_base = 0x78800000, in scls_class_init()
1383 .le_base = 0x78c00000, in scls_class_init()
1384 .apc_base = 0x6a000000, in scls_class_init()
1385 .aux1_base = 0x71900000, in scls_class_init()
1386 .aux2_base = 0x71910000, in scls_class_init()
1387 .nvram_machine_id = 0x80, in scls_class_init()
1389 .iommu_version = 0x05000000, in scls_class_init()
1390 .max_mem = 0x10000000, in scls_class_init()
1403 .iommu_base = 0x10000000, in sbook_class_init()
1404 .tcx_base = 0x50000000, /* XXX */ in sbook_class_init()
1405 .slavio_base = 0x70000000, in sbook_class_init()
1406 .ms_kb_base = 0x71000000, in sbook_class_init()
1407 .serial_base = 0x71100000, in sbook_class_init()
1408 .nvram_base = 0x71200000, in sbook_class_init()
1409 .fd_base = 0x71400000, in sbook_class_init()
1410 .counter_base = 0x71d00000, in sbook_class_init()
1411 .intctl_base = 0x71e00000, in sbook_class_init()
1412 .idreg_base = 0x78000000, in sbook_class_init()
1413 .dma_base = 0x78400000, in sbook_class_init()
1414 .esp_base = 0x78800000, in sbook_class_init()
1415 .le_base = 0x78c00000, in sbook_class_init()
1416 .apc_base = 0x6a000000, in sbook_class_init()
1417 .aux1_base = 0x71900000, in sbook_class_init()
1418 .aux2_base = 0x71910000, in sbook_class_init()
1419 .nvram_machine_id = 0x80, in sbook_class_init()
1421 .iommu_version = 0x05000000, in sbook_class_init()
1422 .max_mem = 0x10000000, in sbook_class_init()