118 static void acpi_dsdt_add_cpus(Aml *scope, RISCVVirtState *s)  in acpi_dsdt_add_cpus()  argument
140             aml_append(scope, dev);  in acpi_dsdt_add_cpus()
144 static void acpi_dsdt_add_plic_aplic(Aml *scope, uint8_t socket_count,  in acpi_dsdt_add_plic_aplic()  argument
164         aml_append(scope, dev);  in acpi_dsdt_add_plic_aplic()
169 acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,  in acpi_dsdt_add_uart()  argument
198     aml_append(scope, dev);  in acpi_dsdt_add_uart()
206 static void acpi_dsdt_add_iommu_sys(Aml *scope, const MemMapEntry *iommu_memmap,  in acpi_dsdt_add_iommu_sys()  argument
224     aml_append(scope, dev);  in acpi_dsdt_add_iommu_sys()
445     Aml *scope, *dsdt;  in build_dsdt()  local
462     scope = aml_scope("\\_SB");  in build_dsdt()
463     acpi_dsdt_add_cpus(scope, s);  in build_dsdt()
465     fw_cfg_acpi_dsdt_add(scope, &memmap[VIRT_FW_CFG]);  in build_dsdt()
470         acpi_dsdt_add_plic_aplic(scope, socket_count, memmap[VIRT_PLIC].base,  in build_dsdt()
473         acpi_dsdt_add_plic_aplic(scope, socket_count, memmap[VIRT_APLIC_S].base,  in build_dsdt()
477     acpi_dsdt_add_uart(scope, &memmap[VIRT_UART0], UART0_IRQ);  in build_dsdt()
479         acpi_dsdt_add_iommu_sys(scope, &memmap[VIRT_IOMMU_SYS], IOMMU_SYS_IRQ);  in build_dsdt()
483         virtio_acpi_dsdt_add(scope, memmap[VIRT_VIRTIO].base,  in build_dsdt()
486         acpi_dsdt_add_gpex_host(scope, PCIE_IRQ);  in build_dsdt()
488         virtio_acpi_dsdt_add(scope, memmap[VIRT_VIRTIO].base,  in build_dsdt()
492         acpi_dsdt_add_gpex_host(scope, PCIE_IRQ + VIRT_IRQCHIP_NUM_SOURCES);  in build_dsdt()
494         virtio_acpi_dsdt_add(scope, memmap[VIRT_VIRTIO].base,  in build_dsdt()
498         acpi_dsdt_add_gpex_host(scope, PCIE_IRQ + VIRT_IRQCHIP_NUM_SOURCES * 2);  in build_dsdt()
501     aml_append(dsdt, scope);  in build_dsdt()