Lines Matching refs:RISCV_IOMMU_REG_CQCSR
1643 ctrl = riscv_iommu_reg_get32(s, RISCV_IOMMU_REG_CQCSR); in riscv_iommu_process_cq_tail()
1659 riscv_iommu_reg_mod32(s, RISCV_IOMMU_REG_CQCSR, in riscv_iommu_process_cq_tail()
1677 riscv_iommu_reg_mod32(s, RISCV_IOMMU_REG_CQCSR, in riscv_iommu_process_cq_tail()
1800 riscv_iommu_reg_mod32(s, RISCV_IOMMU_REG_CQCSR, in riscv_iommu_process_cq_tail()
1820 uint32_t ctrl_set = riscv_iommu_reg_get32(s, RISCV_IOMMU_REG_CQCSR); in riscv_iommu_process_cq_control()
1845 riscv_iommu_reg_mod32(s, RISCV_IOMMU_REG_CQCSR, ctrl_set, ctrl_clr); in riscv_iommu_process_cq_control()
1982 cqcsr = riscv_iommu_reg_get32(s, RISCV_IOMMU_REG_CQCSR); in riscv_iommu_update_ipsr()
2101 case RISCV_IOMMU_REG_CQCSR: in riscv_iommu_mmio_write()
2395 stl_le_p(&s->regs_wc[RISCV_IOMMU_REG_CQCSR], RISCV_IOMMU_CQCSR_CQMF | in riscv_iommu_realize()
2397 stl_le_p(&s->regs_ro[RISCV_IOMMU_REG_CQCSR], RISCV_IOMMU_CQCSR_CQON | in riscv_iommu_realize()
2480 riscv_iommu_reg_mod32(s, RISCV_IOMMU_REG_CQCSR, 0, reg_clr); in riscv_iommu_reset()