Lines Matching refs:lpc
239 bool pnv_lpc_opb_read(PnvLpcController *lpc, uint32_t addr, in pnv_lpc_opb_read() argument
243 return !address_space_read(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, in pnv_lpc_opb_read()
247 bool pnv_lpc_opb_write(PnvLpcController *lpc, uint32_t addr, in pnv_lpc_opb_write() argument
251 return !address_space_write(&lpc->opb_as, addr, MEMTXATTRS_UNSPECIFIED, in pnv_lpc_opb_write()
265 static void pnv_lpc_do_eccb(PnvLpcController *lpc, uint64_t cmd) in pnv_lpc_do_eccb() argument
280 success = pnv_lpc_opb_read(lpc, opb_addr, data, sz); in pnv_lpc_do_eccb()
282 lpc->eccb_stat_reg = ECCB_STAT_OP_DONE | in pnv_lpc_do_eccb()
288 lpc->eccb_stat_reg = ECCB_STAT_OP_DONE | in pnv_lpc_do_eccb()
292 data[0] = lpc->eccb_data_reg >> 24; in pnv_lpc_do_eccb()
293 data[1] = lpc->eccb_data_reg >> 16; in pnv_lpc_do_eccb()
294 data[2] = lpc->eccb_data_reg >> 8; in pnv_lpc_do_eccb()
295 data[3] = lpc->eccb_data_reg; in pnv_lpc_do_eccb()
297 success = pnv_lpc_opb_write(lpc, opb_addr, data, sz); in pnv_lpc_do_eccb()
298 lpc->eccb_stat_reg = ECCB_STAT_OP_DONE; in pnv_lpc_do_eccb()
305 PnvLpcController *lpc = PNV_LPC(opaque); in pnv_lpc_xscom_read() local
315 val = lpc->eccb_stat_reg; in pnv_lpc_xscom_read()
316 lpc->eccb_stat_reg = 0; in pnv_lpc_xscom_read()
319 val = ((uint64_t)lpc->eccb_data_reg) << 32; in pnv_lpc_xscom_read()
328 PnvLpcController *lpc = PNV_LPC(opaque); in pnv_lpc_xscom_write() local
333 pnv_lpc_do_eccb(lpc, val); in pnv_lpc_xscom_write()
341 lpc->eccb_data_reg = val >> 32; in pnv_lpc_xscom_write()
356 static void pnv_lpc_opb_noresponse(PnvLpcController *lpc);
360 PnvLpcController *lpc = PNV_LPC(opaque); in pnv_lpc_mmio_read() local
367 val = address_space_ldl(&lpc->opb_as, opb_addr, MEMTXATTRS_UNSPECIFIED, in pnv_lpc_mmio_read()
371 val = address_space_ldub(&lpc->opb_as, opb_addr, MEMTXATTRS_UNSPECIFIED, in pnv_lpc_mmio_read()
381 pnv_lpc_opb_noresponse(lpc); in pnv_lpc_mmio_read()
392 PnvLpcController *lpc = PNV_LPC(opaque); in pnv_lpc_mmio_write() local
398 address_space_stl(&lpc->opb_as, opb_addr, val, MEMTXATTRS_UNSPECIFIED, in pnv_lpc_mmio_write()
402 address_space_stb(&lpc->opb_as, opb_addr, val, MEMTXATTRS_UNSPECIFIED, in pnv_lpc_mmio_write()
412 pnv_lpc_opb_noresponse(lpc); in pnv_lpc_mmio_write()
429 static void pnv_lpc_eval_serirq_routes(PnvLpcController *lpc) in pnv_lpc_eval_serirq_routes() argument
433 if (!lpc->psi_has_serirq) { in pnv_lpc_eval_serirq_routes()
434 if ((lpc->opb_irq_route0 & PPC_BITMASK32(8, 13)) || in pnv_lpc_eval_serirq_routes()
435 (lpc->opb_irq_route1 & PPC_BITMASK32(4, 31))) { in pnv_lpc_eval_serirq_routes()
447 int serirq = extract32(lpc->opb_irq_route1, in pnv_lpc_eval_serirq_routes()
449 lpc->irq_to_serirq_route[irq] = serirq; in pnv_lpc_eval_serirq_routes()
453 int serirq = extract32(lpc->opb_irq_route0, in pnv_lpc_eval_serirq_routes()
455 lpc->irq_to_serirq_route[irq] = serirq; in pnv_lpc_eval_serirq_routes()
459 static void pnv_lpc_eval_irqs(PnvLpcController *lpc) in pnv_lpc_eval_irqs() argument
463 active_irqs = lpc->lpc_hc_irqstat & lpc->lpc_hc_irqmask; in pnv_lpc_eval_irqs()
464 if (!(lpc->lpc_hc_irqser_ctrl & LPC_HC_IRQSER_EN)) { in pnv_lpc_eval_irqs()
469 if (lpc->psi_has_serirq) { in pnv_lpc_eval_irqs()
481 serirq_out[lpc->irq_to_serirq_route[irq]] = true; in pnv_lpc_eval_irqs()
485 qemu_set_irq(lpc->psi_irq_serirq[0], serirq_out[0]); in pnv_lpc_eval_irqs()
486 qemu_set_irq(lpc->psi_irq_serirq[1], serirq_out[1]); in pnv_lpc_eval_irqs()
487 qemu_set_irq(lpc->psi_irq_serirq[2], serirq_out[2]); in pnv_lpc_eval_irqs()
488 qemu_set_irq(lpc->psi_irq_serirq[3], serirq_out[3]); in pnv_lpc_eval_irqs()
507 lpc->opb_irq_input |= OPB_MASTER_IRQ_LPC; in pnv_lpc_eval_irqs()
509 lpc->opb_irq_input &= ~OPB_MASTER_IRQ_LPC; in pnv_lpc_eval_irqs()
513 lpc->opb_irq_stat |= lpc->opb_irq_input & lpc->opb_irq_mask; in pnv_lpc_eval_irqs()
515 qemu_set_irq(lpc->psi_irq_lpchc, lpc->opb_irq_stat != 0); in pnv_lpc_eval_irqs()
518 static void pnv_lpc_opb_noresponse(PnvLpcController *lpc) in pnv_lpc_opb_noresponse() argument
520 lpc->lpc_hc_irqstat |= LPC_HC_IRQ_SYNC_NORESP_ERR; in pnv_lpc_opb_noresponse()
521 pnv_lpc_eval_irqs(lpc); in pnv_lpc_opb_noresponse()
526 PnvLpcController *lpc = opaque; in lpc_hc_read() local
531 val = lpc->lpc_hc_fw_seg_idsel; in lpc_hc_read()
534 val = lpc->lpc_hc_fw_rd_acc_size; in lpc_hc_read()
537 val = lpc->lpc_hc_irqser_ctrl; in lpc_hc_read()
540 val = lpc->lpc_hc_irqmask; in lpc_hc_read()
543 val = lpc->lpc_hc_irqstat; in lpc_hc_read()
546 val = lpc->lpc_hc_error_addr; in lpc_hc_read()
558 PnvLpcController *lpc = opaque; in lpc_hc_write() local
569 lpc->lpc_hc_fw_seg_idsel = val; in lpc_hc_write()
570 memory_region_set_alias_offset(&lpc->opb_isa_fw, val * LPC_FW_OPB_SIZE); in lpc_hc_write()
573 lpc->lpc_hc_fw_rd_acc_size = val; in lpc_hc_write()
576 lpc->lpc_hc_irqser_ctrl = val; in lpc_hc_write()
577 pnv_lpc_eval_irqs(lpc); in lpc_hc_write()
580 lpc->lpc_hc_irqmask = val; in lpc_hc_write()
581 pnv_lpc_eval_irqs(lpc); in lpc_hc_write()
591 lpc->lpc_hc_irqstat &= ~(val & ~lpc->lpc_hc_irq_inputs); in lpc_hc_write()
592 pnv_lpc_eval_irqs(lpc); in lpc_hc_write()
618 PnvLpcController *lpc = opaque; in opb_master_read() local
623 val = lpc->opb_irq_route0; in opb_master_read()
626 val = lpc->opb_irq_route1; in opb_master_read()
629 val = lpc->opb_irq_stat; in opb_master_read()
632 val = lpc->opb_irq_mask; in opb_master_read()
635 val = lpc->opb_irq_pol; in opb_master_read()
638 val = lpc->opb_irq_input; in opb_master_read()
651 PnvLpcController *lpc = opaque; in opb_master_write() local
655 lpc->opb_irq_route0 = val; in opb_master_write()
656 pnv_lpc_eval_serirq_routes(lpc); in opb_master_write()
657 pnv_lpc_eval_irqs(lpc); in opb_master_write()
660 lpc->opb_irq_route1 = val; in opb_master_write()
661 pnv_lpc_eval_serirq_routes(lpc); in opb_master_write()
662 pnv_lpc_eval_irqs(lpc); in opb_master_write()
665 lpc->opb_irq_stat &= ~val; in opb_master_write()
666 pnv_lpc_eval_irqs(lpc); in opb_master_write()
669 lpc->opb_irq_mask = val; in opb_master_write()
670 pnv_lpc_eval_irqs(lpc); in opb_master_write()
673 lpc->opb_irq_pol = val; in opb_master_write()
674 pnv_lpc_eval_irqs(lpc); in opb_master_write()
701 PnvLpcController *lpc = PNV_LPC(dev); in pnv_lpc_power8_realize() local
712 pnv_xscom_region_init(&lpc->xscom_regs, OBJECT(lpc), in pnv_lpc_power8_realize()
713 &pnv_lpc_xscom_ops, lpc, "xscom-lpc", in pnv_lpc_power8_realize()
743 PnvLpcController *lpc = PNV_LPC(dev); in pnv_lpc_power9_realize() local
747 object_property_set_bool(OBJECT(lpc), "psi-serirq", true, &error_abort); in pnv_lpc_power9_realize()
756 memory_region_init_io(&lpc->xscom_regs, OBJECT(lpc), &pnv_lpc_mmio_ops, in pnv_lpc_power9_realize()
757 lpc, "lpcm", PNV9_LPCM_SIZE); in pnv_lpc_power9_realize()
760 qdev_init_gpio_out_named(dev, lpc->psi_irq_serirq, "SERIRQ", 4); in pnv_lpc_power9_realize()
795 PnvLpcController *lpc = PNV_LPC(dev); in pnv_lpc_realize() local
798 lpc->lpc_hc_fw_rd_acc_size = LPC_HC_FW_RD_4B; in pnv_lpc_realize()
801 memory_region_init(&lpc->opb_mr, OBJECT(dev), "lpc-opb", 0x100000000ull); in pnv_lpc_realize()
802 address_space_init(&lpc->opb_as, &lpc->opb_mr, "lpc-opb"); in pnv_lpc_realize()
808 memory_region_init(&lpc->isa_io, OBJECT(dev), "isa-io", ISA_IO_SIZE); in pnv_lpc_realize()
809 memory_region_init(&lpc->isa_mem, OBJECT(dev), "isa-mem", ISA_MEM_SIZE); in pnv_lpc_realize()
810 memory_region_init(&lpc->isa_fw, OBJECT(dev), "isa-fw", ISA_FW_SIZE); in pnv_lpc_realize()
813 memory_region_init_alias(&lpc->opb_isa_io, OBJECT(dev), "lpc-isa-io", in pnv_lpc_realize()
814 &lpc->isa_io, 0, LPC_IO_OPB_SIZE); in pnv_lpc_realize()
815 memory_region_add_subregion(&lpc->opb_mr, LPC_IO_OPB_ADDR, in pnv_lpc_realize()
816 &lpc->opb_isa_io); in pnv_lpc_realize()
817 memory_region_init_alias(&lpc->opb_isa_mem, OBJECT(dev), "lpc-isa-mem", in pnv_lpc_realize()
818 &lpc->isa_mem, 0, LPC_MEM_OPB_SIZE); in pnv_lpc_realize()
819 memory_region_add_subregion(&lpc->opb_mr, LPC_MEM_OPB_ADDR, in pnv_lpc_realize()
820 &lpc->opb_isa_mem); in pnv_lpc_realize()
821 memory_region_init_alias(&lpc->opb_isa_fw, OBJECT(dev), "lpc-isa-fw", in pnv_lpc_realize()
822 &lpc->isa_fw, 0, LPC_FW_OPB_SIZE); in pnv_lpc_realize()
823 memory_region_add_subregion(&lpc->opb_mr, LPC_FW_OPB_ADDR, in pnv_lpc_realize()
824 &lpc->opb_isa_fw); in pnv_lpc_realize()
827 memory_region_init_io(&lpc->opb_master_regs, OBJECT(dev), &opb_master_ops, in pnv_lpc_realize()
828 lpc, "lpc-opb-master", LPC_OPB_REGS_OPB_SIZE); in pnv_lpc_realize()
829 lpc->opb_master_regs.disable_reentrancy_guard = true; in pnv_lpc_realize()
830 memory_region_add_subregion(&lpc->opb_mr, LPC_OPB_REGS_OPB_ADDR, in pnv_lpc_realize()
831 &lpc->opb_master_regs); in pnv_lpc_realize()
832 memory_region_init_io(&lpc->lpc_hc_regs, OBJECT(dev), &lpc_hc_ops, lpc, in pnv_lpc_realize()
835 lpc->lpc_hc_regs.disable_reentrancy_guard = true; in pnv_lpc_realize()
836 memory_region_add_subregion(&lpc->opb_mr, LPC_HC_REGS_OPB_ADDR, in pnv_lpc_realize()
837 &lpc->lpc_hc_regs); in pnv_lpc_realize()
839 qdev_init_gpio_out_named(dev, &lpc->psi_irq_lpchc, "LPCHC", 1); in pnv_lpc_realize()
887 PnvLpcController *lpc = PNV_LPC(opaque); in type_init() local
896 qemu_set_irq(lpc->psi_irq_lpchc, pnv->cpld_irqstate != 0); in type_init()
902 PnvLpcController *lpc = PNV_LPC(opaque); in pnv_lpc_isa_irq_handler() local
906 lpc->lpc_hc_irq_inputs |= irq_bit; in pnv_lpc_isa_irq_handler()
913 lpc->lpc_hc_irqstat |= irq_bit; in pnv_lpc_isa_irq_handler()
914 pnv_lpc_eval_irqs(lpc); in pnv_lpc_isa_irq_handler()
916 lpc->lpc_hc_irq_inputs &= ~irq_bit; in pnv_lpc_isa_irq_handler()
919 if (lpc->psi_has_serirq && in pnv_lpc_isa_irq_handler()
920 (lpc->lpc_hc_irqser_ctrl & LPC_HC_IRQSER_AUTO_CLEAR)) { in pnv_lpc_isa_irq_handler()
921 lpc->lpc_hc_irqstat &= ~irq_bit; in pnv_lpc_isa_irq_handler()
922 pnv_lpc_eval_irqs(lpc); in pnv_lpc_isa_irq_handler()
927 ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool use_cpld, Error **errp) in pnv_lpc_isa_create() argument
938 isa_bus = isa_bus_new(NULL, &lpc->isa_mem, &lpc->isa_io, &local_err); in pnv_lpc_isa_create()
955 irqs = qemu_allocate_irqs(handler, lpc, ISA_NUM_IRQS); in pnv_lpc_isa_create()