Lines Matching full:cells
652 qemu_fdt_setprop_cell(fi->fdt, fi->path, "#size-cells", 0); in dt_usb()
653 qemu_fdt_setprop_cell(fi->fdt, fi->path, "#address-cells", 1); in dt_usb()
660 uint32_t cells[3]; in dt_isa() local
662 qemu_fdt_setprop_cell(fi->fdt, fi->path, "#size-cells", 1); in dt_isa()
663 qemu_fdt_setprop_cell(fi->fdt, fi->path, "#address-cells", 2); in dt_isa()
671 cells[0] = cpu_to_be32(7); in dt_isa()
672 cells[1] = 0; in dt_isa()
674 cells, 2 * sizeof(cells[0])); in dt_isa()
675 cells[0] = cpu_to_be32(1); in dt_isa()
676 cells[1] = cpu_to_be32(0x3bc); in dt_isa()
677 cells[2] = cpu_to_be32(8); in dt_isa()
678 qemu_fdt_setprop(fi->fdt, name->str, "reg", cells, 3 * sizeof(cells[0])); in dt_isa()
685 cells[0] = cpu_to_be32(6); in dt_isa()
686 cells[1] = 0; in dt_isa()
688 cells, 2 * sizeof(cells[0])); in dt_isa()
689 cells[0] = cpu_to_be32(1); in dt_isa()
690 cells[1] = cpu_to_be32(0x3f0); in dt_isa()
691 cells[2] = cpu_to_be32(8); in dt_isa()
692 qemu_fdt_setprop(fi->fdt, name->str, "reg", cells, 3 * sizeof(cells[0])); in dt_isa()
699 cells[0] = cpu_to_be32(1); in dt_isa()
700 cells[1] = cpu_to_be32(0x40); in dt_isa()
701 cells[2] = cpu_to_be32(8); in dt_isa()
702 qemu_fdt_setprop(fi->fdt, name->str, "reg", cells, 3 * sizeof(cells[0])); in dt_isa()
710 cells[0] = cpu_to_be32(8); in dt_isa()
711 cells[1] = 0; in dt_isa()
713 cells, 2 * sizeof(cells[0])); in dt_isa()
714 cells[0] = cpu_to_be32(1); in dt_isa()
715 cells[1] = cpu_to_be32(0x70); in dt_isa()
716 cells[2] = cpu_to_be32(2); in dt_isa()
717 qemu_fdt_setprop(fi->fdt, name->str, "reg", cells, 3 * sizeof(cells[0])); in dt_isa()
723 cells[0] = cpu_to_be32(1); in dt_isa()
724 cells[1] = 0; in dt_isa()
726 cells, 2 * sizeof(cells[0])); in dt_isa()
727 cells[0] = cpu_to_be32(1); in dt_isa()
728 cells[1] = cpu_to_be32(0x60); in dt_isa()
729 cells[2] = cpu_to_be32(5); in dt_isa()
730 qemu_fdt_setprop(fi->fdt, name->str, "reg", cells, 3 * sizeof(cells[0])); in dt_isa()
736 qemu_fdt_setprop_cell(fi->fdt, name->str, "#interrupt-cells", 2); in dt_isa()
737 qemu_fdt_setprop_cell(fi->fdt, name->str, "#size-cells", 0); in dt_isa()
738 qemu_fdt_setprop_cell(fi->fdt, name->str, "#address-cells", 1); in dt_isa()
741 cells[0] = cpu_to_be32(1); in dt_isa()
742 cells[1] = cpu_to_be32(0x60); in dt_isa()
743 cells[2] = cpu_to_be32(5); in dt_isa()
744 qemu_fdt_setprop(fi->fdt, name->str, "reg", cells, 3 * sizeof(cells[0])); in dt_isa()
751 cells[0] = cpu_to_be32(3); in dt_isa()
752 cells[1] = 0; in dt_isa()
754 cells, 2 * sizeof(cells[0])); in dt_isa()
755 cells[0] = cpu_to_be32(1); in dt_isa()
756 cells[1] = cpu_to_be32(0x2f8); in dt_isa()
757 cells[2] = cpu_to_be32(8); in dt_isa()
758 qemu_fdt_setprop(fi->fdt, name->str, "reg", cells, 3 * sizeof(cells[0])); in dt_isa()
784 uint32_t cells[(PCI_NUM_REGIONS + 1) * 5]; in add_pci_device() local
815 cells[0] = cpu_to_be32(d->devfn << 8); in add_pci_device()
816 cells[1] = 0; in add_pci_device()
817 cells[2] = 0; in add_pci_device()
818 cells[3] = 0; in add_pci_device()
819 cells[4] = 0; in add_pci_device()
825 cells[j] = PCI_BASE_ADDRESS_0 + i * 4; in add_pci_device()
826 if (cells[j] == 0x28) { in add_pci_device()
827 cells[j] = 0x30; in add_pci_device()
829 cells[j] = cpu_to_be32(d->devfn << 8 | cells[j]); in add_pci_device()
831 cells[j] |= cpu_to_be32(1 << 24); in add_pci_device()
834 cells[j] |= cpu_to_be32(3 << 24); in add_pci_device()
836 cells[j] |= cpu_to_be32(2 << 24); in add_pci_device()
839 cells[j] |= cpu_to_be32(4 << 28); in add_pci_device()
842 cells[j + 1] = 0; in add_pci_device()
843 cells[j + 2] = 0; in add_pci_device()
844 cells[j + 3] = cpu_to_be32(d->io_regions[i].size >> 32); in add_pci_device()
845 cells[j + 4] = cpu_to_be32(d->io_regions[i].size); in add_pci_device()
848 qemu_fdt_setprop(fi->fdt, node->str, "reg", cells, j * sizeof(cells[0])); in add_pci_device()
859 cells[0] = pci_get_long(&d->config[PCI_CLASS_REVISION]); in add_pci_device()
860 qemu_fdt_setprop_cell(fi->fdt, node->str, "class-code", cells[0] >> 8); in add_pci_device()
861 qemu_fdt_setprop_cell(fi->fdt, node->str, "revision-id", cells[0] & 0xff); in add_pci_device()
876 uint32_t cells[16]; in build_fdt() local
889 qemu_fdt_setprop_cell(fdt, "/", "#address-cells", 1); in build_fdt()
894 cells[0] = 0; in build_fdt()
895 cells[1] = 0; in build_fdt()
897 cells, 2 * sizeof(cells[0])); in build_fdt()
899 cells[0] = cpu_to_be32(PCI0_MEM_BASE); in build_fdt()
900 cells[1] = cpu_to_be32(PCI0_MEM_SIZE); in build_fdt()
901 qemu_fdt_setprop(fdt, "/pci@c0000000", "reg", cells, 2 * sizeof(cells[0])); in build_fdt()
902 cells[0] = cpu_to_be32(0x01000000); in build_fdt()
903 cells[1] = 0; in build_fdt()
904 cells[2] = 0; in build_fdt()
905 cells[3] = cpu_to_be32(PCI0_IO_BASE); in build_fdt()
906 cells[4] = 0; in build_fdt()
907 cells[5] = cpu_to_be32(PCI0_IO_SIZE); in build_fdt()
908 cells[6] = cpu_to_be32(0x02000000); in build_fdt()
909 cells[7] = 0; in build_fdt()
910 cells[8] = cpu_to_be32(PCI0_MEM_BASE); in build_fdt()
911 cells[9] = cpu_to_be32(PCI0_MEM_BASE); in build_fdt()
912 cells[10] = 0; in build_fdt()
913 cells[11] = cpu_to_be32(PCI0_MEM_SIZE); in build_fdt()
915 cells, 12 * sizeof(cells[0])); in build_fdt()
916 qemu_fdt_setprop_cell(fdt, "/pci@c0000000", "#size-cells", 2); in build_fdt()
917 qemu_fdt_setprop_cell(fdt, "/pci@c0000000", "#address-cells", 3); in build_fdt()
927 cells[0] = 0; in build_fdt()
928 cells[1] = 0; in build_fdt()
930 cells, 2 * sizeof(cells[0])); in build_fdt()
932 cells[0] = cpu_to_be32(PCI1_MEM_BASE); in build_fdt()
933 cells[1] = cpu_to_be32(PCI1_MEM_SIZE); in build_fdt()
934 qemu_fdt_setprop(fdt, "/pci@80000000", "reg", cells, 2 * sizeof(cells[0])); in build_fdt()
937 cells[0] = cpu_to_be32(0x01000000); in build_fdt()
938 cells[1] = 0; in build_fdt()
939 cells[2] = 0; in build_fdt()
940 cells[3] = cpu_to_be32(PCI1_IO_BASE); in build_fdt()
941 cells[4] = 0; in build_fdt()
942 cells[5] = cpu_to_be32(PCI1_IO_SIZE); in build_fdt()
943 cells[6] = cpu_to_be32(0x02000000); in build_fdt()
944 cells[7] = 0; in build_fdt()
945 cells[8] = cpu_to_be32(PCI1_MEM_BASE); in build_fdt()
946 cells[9] = cpu_to_be32(PCI1_MEM_BASE); in build_fdt()
947 cells[10] = 0; in build_fdt()
948 cells[11] = cpu_to_be32(PCI1_MEM_SIZE); in build_fdt()
950 cells, 12 * sizeof(cells[0])); in build_fdt()
951 qemu_fdt_setprop_cell(fdt, "/pci@80000000", "#size-cells", 2); in build_fdt()
952 qemu_fdt_setprop_cell(fdt, "/pci@80000000", "#address-cells", 3); in build_fdt()
997 qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 1); in build_fdt()
998 qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0); in build_fdt()
1047 cells[0] = 0; in build_fdt()
1048 cells[1] = 0; in build_fdt()
1049 qemu_fdt_setprop(fdt, cp, "reg", cells, 2 * sizeof(cells[0])); in build_fdt()
1055 cells[0] = 0; in build_fdt()
1056 cells[1] = cpu_to_be32(machine->ram_size); in build_fdt()
1057 qemu_fdt_setprop(fdt, "/memory@0", "reg", cells, 2 * sizeof(cells[0])); in build_fdt()