163     qemu_fdt_setprop_cells(fdt, node, "#gpio-cells", 2);  in create_dt_mpc8xxx_gpio()
205     qemu_fdt_setprop_cell(fdt, i2c, "#size-cells", 0);  in dt_i2c_create()
206     qemu_fdt_setprop_cell(fdt, i2c, "#address-cells", 1);  in dt_i2c_create()
261     qemu_fdt_setprop_cells(fdt, node, "#size-cells", 1);  in create_devtree_etsec()
262     qemu_fdt_setprop_cells(fdt, node, "#address-cells", 1);  in create_devtree_etsec()
338     qemu_fdt_setprop_cells(fdt, node, "#size-cells", 1);  in platform_bus_create_devtree()
339     qemu_fdt_setprop_cells(fdt, node, "#address-cells", 1);  in platform_bus_create_devtree()
430     qemu_fdt_setprop_cell(fdt, "/", "#address-cells", 2);  in ppce500_load_device_tree()
431     qemu_fdt_setprop_cell(fdt, "/", "#size-cells", 2);  in ppce500_load_device_tree()
491     qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 1);  in ppce500_load_device_tree()
492     qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0);  in ppce500_load_device_tree()
539     qemu_fdt_setprop_cell(fdt, soc, "#address-cells", 1);  in ppce500_load_device_tree()
540     qemu_fdt_setprop_cell(fdt, soc, "#size-cells", 1);  in ppce500_load_device_tree()
553     qemu_fdt_setprop_cell(fdt, mpic, "#address-cells", 0);  in ppce500_load_device_tree()
554     qemu_fdt_setprop_cell(fdt, mpic, "#interrupt-cells", 2);  in ppce500_load_device_tree()
638     qemu_fdt_setprop_cell(fdt, pci, "#interrupt-cells", 1);  in ppce500_load_device_tree()
639     qemu_fdt_setprop_cell(fdt, pci, "#size-cells", 2);  in ppce500_load_device_tree()
640     qemu_fdt_setprop_cell(fdt, pci, "#address-cells", 3);  in ppce500_load_device_tree()