Lines Matching +full:config +full:- +full:host
34 #include "hw/pci-host/q35.h"
35 #include "hw/qdev-properties.h"
42 * Q35 host
53 memory_region_add_subregion(s->mch.address_space_io, in q35_host_realize()
54 MCH_HOST_BRIDGE_CONFIG_ADDR, &pci->conf_mem); in q35_host_realize()
57 memory_region_add_subregion(s->mch.address_space_io, in q35_host_realize()
58 MCH_HOST_BRIDGE_CONFIG_DATA, &pci->data_mem); in q35_host_realize()
62 memory_region_set_flush_coalesced(&pci->data_mem); in q35_host_realize()
63 memory_region_add_coalescing(&pci->conf_mem, 0, 4); in q35_host_realize()
65 pci->bus = pci_root_bus_new(DEVICE(s), "pcie.0", in q35_host_realize()
66 s->mch.pci_address_space, in q35_host_realize()
67 s->mch.address_space_io, in q35_host_realize()
70 qdev_realize(DEVICE(&s->mch), BUS(pci->bus), &error_fatal); in q35_host_realize()
87 val64 = range_is_empty(&s->mch.pci_hole) in q35_host_get_pci_hole_start()
88 ? 0 : range_lob(&s->mch.pci_hole); in q35_host_get_pci_hole_start()
102 val64 = range_is_empty(&s->mch.pci_hole) in q35_host_get_pci_hole_end()
103 ? 0 : range_upb(&s->mch.pci_hole) + 1; in q35_host_get_pci_hole_end()
123 pci_bus_get_w64_range(h->bus, &w64); in q35_host_get_pci_hole64_start_value()
125 if (!value && s->pci_hole64_fix) { in q35_host_get_pci_hole64_start_value()
156 pci_bus_get_w64_range(h->bus, &w64); in q35_host_get_pci_hole64_end()
158 hole64_end = ROUND_UP(hole64_start + s->mch.pci_hole64_size, 1ULL << 30); in q35_host_get_pci_hole64_end()
159 if (s->pci_hole64_fix && value < hole64_end) { in q35_host_get_pci_hole64_end()
168 * zeroed by the object_initialize(&s->mch, ...) call inside
184 DEFINE_PROP_BOOL("x-pci-hole64-fix", Q35PCIHost, pci_hole64_fix, true),
192 hc->root_bus_path = q35_host_root_bus_path; in q35_host_class_init()
193 dc->realize = q35_host_realize; in q35_host_class_init()
196 dc->user_creatable = false; in q35_host_class_init()
197 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); in q35_host_class_init()
198 dc->fw_name = "pci"; in q35_host_class_init()
207 memory_region_init_io(&phb->conf_mem, obj, &pci_host_conf_le_ops, phb, in q35_host_initfn()
208 "pci-conf-idx", 4); in q35_host_initfn()
209 memory_region_init_io(&phb->data_mem, obj, &pci_host_data_le_ops, phb, in q35_host_initfn()
210 "pci-conf-data", 4); in q35_host_initfn()
212 object_initialize_child(OBJECT(s), "mch", &s->mch, TYPE_MCH_PCI_DEVICE); in q35_host_initfn()
213 qdev_prop_set_int32(DEVICE(&s->mch), "addr", PCI_DEVFN(0, 0)); in q35_host_initfn()
214 qdev_prop_set_bit(DEVICE(&s->mch), "multifunction", false); in q35_host_initfn()
236 &pehb->size, OBJ_PROP_FLAG_READ); in q35_host_initfn()
239 (Object **) &s->mch.ram_memory, in q35_host_initfn()
243 (Object **) &s->mch.pci_address_space, in q35_host_initfn()
247 (Object **) &s->mch.system_memory, in q35_host_initfn()
251 (Object **) &s->mch.address_space_io, in q35_host_initfn()
293 PCIExpressHost *pehb = PCIE_HOST_BRIDGE(bus->parent); in mch_update_pciexbar()
301 pciexbar = pci_get_quad(pci_dev->config + MCH_HOST_BRIDGE_PCIEXBAR); in mch_update_pciexbar()
335 pam_update(&mch->pam_regions[i], i, in mch_update_pam()
336 pd->config[MCH_HOST_BRIDGE_PAM0 + DIV_ROUND_UP(i, 2)]); in mch_update_pam()
345 bool h_smrame = (pd->config[MCH_HOST_BRIDGE_ESMRAMC] & MCH_HOST_BRIDGE_ESMRAMC_H_SMRAME); in mch_update_smram()
349 if (pd->config[MCH_HOST_BRIDGE_SMRAM] & MCH_HOST_BRIDGE_SMRAM_D_LCK) { in mch_update_smram()
350 pd->config[MCH_HOST_BRIDGE_SMRAM] &= ~MCH_HOST_BRIDGE_SMRAM_D_OPEN; in mch_update_smram()
351 pd->wmask[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_WMASK_LCK; in mch_update_smram()
352 pd->wmask[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_WMASK_LCK; in mch_update_smram()
357 if (pd->config[MCH_HOST_BRIDGE_SMRAM] & SMRAM_D_OPEN) { in mch_update_smram()
359 memory_region_set_enabled(&mch->smram_region, h_smrame); in mch_update_smram()
361 memory_region_set_enabled(&mch->open_high_smram, h_smrame); in mch_update_smram()
364 memory_region_set_enabled(&mch->smram_region, true); in mch_update_smram()
365 memory_region_set_enabled(&mch->open_high_smram, false); in mch_update_smram()
368 if (pd->config[MCH_HOST_BRIDGE_SMRAM] & SMRAM_G_SMRAME) { in mch_update_smram()
369 memory_region_set_enabled(&mch->low_smram, !h_smrame); in mch_update_smram()
370 memory_region_set_enabled(&mch->high_smram, h_smrame); in mch_update_smram()
372 memory_region_set_enabled(&mch->low_smram, false); in mch_update_smram()
373 memory_region_set_enabled(&mch->high_smram, false); in mch_update_smram()
376 if ((pd->config[MCH_HOST_BRIDGE_ESMRAMC] & MCH_HOST_BRIDGE_ESMRAMC_T_EN) && in mch_update_smram()
377 (pd->config[MCH_HOST_BRIDGE_SMRAM] & SMRAM_G_SMRAME)) { in mch_update_smram()
378 switch (pd->config[MCH_HOST_BRIDGE_ESMRAMC] & in mch_update_smram()
390 tseg_size = 1024 * 1024 * (uint32_t)mch->ext_tseg_mbytes; in mch_update_smram()
396 memory_region_del_subregion(mch->system_memory, &mch->tseg_blackhole); in mch_update_smram()
397 memory_region_set_enabled(&mch->tseg_blackhole, tseg_size); in mch_update_smram()
398 memory_region_set_size(&mch->tseg_blackhole, tseg_size); in mch_update_smram()
399 memory_region_add_subregion_overlap(mch->system_memory, in mch_update_smram()
400 mch->below_4g_mem_size - tseg_size, in mch_update_smram()
401 &mch->tseg_blackhole, 1); in mch_update_smram()
403 memory_region_set_enabled(&mch->tseg_window, tseg_size); in mch_update_smram()
404 memory_region_set_size(&mch->tseg_window, tseg_size); in mch_update_smram()
405 memory_region_set_address(&mch->tseg_window, in mch_update_smram()
406 mch->below_4g_mem_size - tseg_size); in mch_update_smram()
407 memory_region_set_alias_offset(&mch->tseg_window, in mch_update_smram()
408 mch->below_4g_mem_size - tseg_size); in mch_update_smram()
416 uint8_t *reg = pd->config + MCH_HOST_BRIDGE_EXT_TSEG_MBYTES; in mch_update_ext_tseg_mbytes()
418 if (mch->ext_tseg_mbytes > 0 && in mch_update_ext_tseg_mbytes()
420 pci_set_word(reg, mch->ext_tseg_mbytes); in mch_update_ext_tseg_mbytes()
427 uint8_t *reg = pd->config + MCH_HOST_BRIDGE_F_SMBASE; in mch_update_smbase_smram()
430 if (!mch->has_smram_at_smbase) { in mch_update_smbase_smram()
435 pd->wmask[MCH_HOST_BRIDGE_F_SMBASE] = in mch_update_smbase_smram()
445 if (pd->wmask[MCH_HOST_BRIDGE_F_SMBASE] == 0xff) { in mch_update_smbase_smram()
452 pd->wmask[MCH_HOST_BRIDGE_F_SMBASE] &= in mch_update_smbase_smram()
459 memory_region_set_enabled(&mch->smbase_blackhole, lck); in mch_update_smbase_smram()
460 memory_region_set_enabled(&mch->smbase_window, lck); in mch_update_smbase_smram()
481 if (!mch->has_smm_ranges) { in mch_write_config()
505 if (mch->has_smm_ranges) { in mch_update()
512 * pci hole goes from end-of-low-ram to io-apic. in mch_update()
515 range_set_bounds(&mch->pci_hole, in mch_update()
516 mch->below_4g_mem_size, in mch_update()
517 IO_APIC_DEFAULT_ADDRESS - 1); in mch_update()
547 pci_set_quad(d->config + MCH_HOST_BRIDGE_PCIEXBAR, in mch_reset()
550 if (mch->has_smm_ranges) { in mch_reset()
551 d->config[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_DEFAULT; in mch_reset()
552 d->config[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_DEFAULT; in mch_reset()
553 d->wmask[MCH_HOST_BRIDGE_SMRAM] = MCH_HOST_BRIDGE_SMRAM_WMASK; in mch_reset()
554 d->wmask[MCH_HOST_BRIDGE_ESMRAMC] = MCH_HOST_BRIDGE_ESMRAMC_WMASK; in mch_reset()
556 if (mch->ext_tseg_mbytes > 0) { in mch_reset()
557 pci_set_word(d->config + MCH_HOST_BRIDGE_EXT_TSEG_MBYTES, in mch_reset()
561 d->config[MCH_HOST_BRIDGE_F_SMBASE] = 0; in mch_reset()
562 d->wmask[MCH_HOST_BRIDGE_F_SMBASE] = 0xff; in mch_reset()
573 if (mch->ext_tseg_mbytes > MCH_HOST_BRIDGE_EXT_TSEG_MBYTES_MAX) { in mch_realize()
574 error_setg(errp, "invalid extended-tseg-mbytes value: %" PRIu16, in mch_realize()
575 mch->ext_tseg_mbytes); in mch_realize()
580 pc_pci_as_mapping_init(mch->system_memory, mch->pci_address_space); in mch_realize()
583 init_pam(&mch->pam_regions[0], OBJECT(mch), mch->ram_memory, in mch_realize()
584 mch->system_memory, mch->pci_address_space, in mch_realize()
586 for (i = 0; i < ARRAY_SIZE(mch->pam_regions) - 1; ++i) { in mch_realize()
587 init_pam(&mch->pam_regions[i + 1], OBJECT(mch), mch->ram_memory, in mch_realize()
588 mch->system_memory, mch->pci_address_space, in mch_realize()
592 if (!mch->has_smm_ranges) { in mch_realize()
597 memory_region_init_alias(&mch->smram_region, OBJECT(mch), "smram-region", in mch_realize()
598 mch->pci_address_space, MCH_HOST_BRIDGE_SMRAM_C_BASE, in mch_realize()
600 memory_region_add_subregion_overlap(mch->system_memory, MCH_HOST_BRIDGE_SMRAM_C_BASE, in mch_realize()
601 &mch->smram_region, 1); in mch_realize()
602 memory_region_set_enabled(&mch->smram_region, true); in mch_realize()
604 memory_region_init_alias(&mch->open_high_smram, OBJECT(mch), "smram-open-high", in mch_realize()
605 mch->ram_memory, MCH_HOST_BRIDGE_SMRAM_C_BASE, in mch_realize()
607 memory_region_add_subregion_overlap(mch->system_memory, 0xfeda0000, in mch_realize()
608 &mch->open_high_smram, 1); in mch_realize()
609 memory_region_set_enabled(&mch->open_high_smram, false); in mch_realize()
612 memory_region_init(&mch->smram, OBJECT(mch), "smram", 4 * GiB); in mch_realize()
613 memory_region_set_enabled(&mch->smram, true); in mch_realize()
614 memory_region_init_alias(&mch->low_smram, OBJECT(mch), "smram-low", in mch_realize()
615 mch->ram_memory, MCH_HOST_BRIDGE_SMRAM_C_BASE, in mch_realize()
617 memory_region_set_enabled(&mch->low_smram, true); in mch_realize()
618 memory_region_add_subregion(&mch->smram, MCH_HOST_BRIDGE_SMRAM_C_BASE, in mch_realize()
619 &mch->low_smram); in mch_realize()
620 memory_region_init_alias(&mch->high_smram, OBJECT(mch), "smram-high", in mch_realize()
621 mch->ram_memory, MCH_HOST_BRIDGE_SMRAM_C_BASE, in mch_realize()
623 memory_region_set_enabled(&mch->high_smram, true); in mch_realize()
624 memory_region_add_subregion(&mch->smram, 0xfeda0000, &mch->high_smram); in mch_realize()
626 memory_region_init_io(&mch->tseg_blackhole, OBJECT(mch), in mch_realize()
628 "tseg-blackhole", 0); in mch_realize()
629 memory_region_set_enabled(&mch->tseg_blackhole, false); in mch_realize()
630 memory_region_add_subregion_overlap(mch->system_memory, in mch_realize()
631 mch->below_4g_mem_size, in mch_realize()
632 &mch->tseg_blackhole, 1); in mch_realize()
634 memory_region_init_alias(&mch->tseg_window, OBJECT(mch), "tseg-window", in mch_realize()
635 mch->ram_memory, mch->below_4g_mem_size, 0); in mch_realize()
636 memory_region_set_enabled(&mch->tseg_window, false); in mch_realize()
637 memory_region_add_subregion(&mch->smram, mch->below_4g_mem_size, in mch_realize()
638 &mch->tseg_window); in mch_realize()
644 memory_region_init_io(&mch->smbase_blackhole, OBJECT(mch), &blackhole_ops, in mch_realize()
645 NULL, "smbase-blackhole", in mch_realize()
647 memory_region_set_enabled(&mch->smbase_blackhole, false); in mch_realize()
648 memory_region_add_subregion_overlap(mch->system_memory, in mch_realize()
650 &mch->smbase_blackhole, 1); in mch_realize()
652 memory_region_init_alias(&mch->smbase_window, OBJECT(mch), in mch_realize()
653 "smbase-window", mch->ram_memory, in mch_realize()
656 memory_region_set_enabled(&mch->smbase_window, false); in mch_realize()
657 memory_region_add_subregion(&mch->smram, MCH_HOST_BRIDGE_SMBASE_ADDR, in mch_realize()
658 &mch->smbase_window); in mch_realize()
661 OBJECT(&mch->smram)); in mch_realize()
665 DEFINE_PROP_UINT16("extended-tseg-mbytes", MCHPCIState, ext_tseg_mbytes,
667 DEFINE_PROP_BOOL("smbase-smram", MCHPCIState, has_smram_at_smbase, true),
675 k->realize = mch_realize; in mch_class_init()
676 k->config_write = mch_write_config; in mch_class_init()
679 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); in mch_class_init()
680 dc->desc = "Host bridge"; in mch_class_init()
681 dc->vmsd = &vmstate_mch; in mch_class_init()
682 k->vendor_id = PCI_VENDOR_ID_INTEL; in mch_class_init()
691 k->device_id = PCI_DEVICE_ID_INTEL_P35_MCH; in mch_class_init()
692 k->revision = MCH_HOST_BRIDGE_REVISION_DEFAULT; in mch_class_init()
693 k->class_id = PCI_CLASS_BRIDGE_HOST; in mch_class_init()
695 * PCI-facing part of the host bridge, not usable without the in mch_class_init()
696 * host-facing part, which can't be device_add'ed, yet. in mch_class_init()
698 dc->user_creatable = false; in mch_class_init()