120     MemoryRegion *mem   = &root->msi.iomem;  in designware_pcie_root_update_msi_mapping()  local
124     memory_region_set_address(mem, base);  in designware_pcie_root_update_msi_mapping()
125     memory_region_set_enabled(mem, enable);  in designware_pcie_root_update_msi_mapping()
283         current = &viewport->mem;  in designware_pcie_update_viewport()
288         other   = &viewport->mem;  in designware_pcie_update_viewport()
292      * An outbound viewport can be reconfigure from being MEM to CFG,  in designware_pcie_update_viewport()
422         MemoryRegion *source, *destination, *mem;  in designware_pcie_root_realize()  local
441         mem  = &viewport->mem;  in designware_pcie_root_realize()
442         name = designware_pcie_viewport_name(direction, i, "MEM");  in designware_pcie_root_realize()
443         memory_region_init_alias(mem, OBJECT(root), name, destination,  in designware_pcie_root_realize()
445         memory_region_add_subregion_overlap(source, dummy_offset, mem, -1);  in designware_pcie_root_realize()
446         memory_region_set_enabled(mem, false);  in designware_pcie_root_realize()
465         mem  = &viewport->mem;  in designware_pcie_root_realize()
466         name = designware_pcie_viewport_name(direction, i, "MEM");  in designware_pcie_root_realize()
467         memory_region_init_alias(mem, OBJECT(root), name, destination,  in designware_pcie_root_realize()
469         memory_region_add_subregion(source, dummy_offset, mem);  in designware_pcie_root_realize()
470         memory_region_set_enabled(mem, false);  in designware_pcie_root_realize()
477         mem  = &viewport->cfg;  in designware_pcie_root_realize()
482         memory_region_add_subregion(source, dummy_offset, mem);  in designware_pcie_root_realize()
483         memory_region_set_enabled(mem, false);  in designware_pcie_root_realize()