Lines Matching +full:fpga +full:- +full:based
4 * Copyright (c) 2008 yajin (yajin@vm-kernel.org)
9 * Contributions after 2012-01-13 are licensed under the terms of the
23 * In bonito north bridge, pci slot = IDSEL bit - 12.
25 * pci slot = 17-12=5
44 #include "qemu/error-report.h"
48 #include "hw/pci-host/bonito.h"
65 /* from linux source code. include/asm-mips/mips-boards/bonito64.h*/
68 #define BONITO_BOOT_TOP (BONITO_BOOT_BASE + BONITO_BOOT_SIZE - 1)
71 #define BONITO_FLASH_TOP (BONITO_FLASH_BASE + BONITO_FLASH_SIZE - 1)
74 #define BONITO_SOCKET_TOP (BONITO_SOCKET_BASE + BONITO_SOCKET_SIZE - 1)
77 #define BONITO_REG_TOP (BONITO_REG_BASE + BONITO_REG_SIZE - 1)
80 #define BONITO_DEV_TOP (BONITO_DEV_BASE + BONITO_DEV_SIZE - 1)
84 #define BONITO_PCILO_TOP (BONITO_PCILO_BASE + BONITO_PCILO_SIZE - 1)
90 #define BONITO_PCIHI_TOP (BONITO_PCIHI_BASE + BONITO_PCIHI_SIZE - 1)
94 #define BONITO_PCIIO_TOP (BONITO_PCIIO_BASE + BONITO_PCIIO_SIZE - 1)
97 #define BONITO_PCICFG_TOP (BONITO_PCICFG_BASE + BONITO_PCICFG_SIZE - 1)
144 /* GPIO Regs - r/w */
149 /* ICU Configuration Regs - r/w */
154 /* ICU Enable Regs - IntEn & IntISR are r/o. */
217 /* Based at 1fe00300, bonito Copier */
280 s->regs[saddr] = val; in OBJECT_DECLARE_SIMPLE_TYPE()
283 if (!(s->regs[saddr] & 0x04) && (val & 0x04)) { in OBJECT_DECLARE_SIMPLE_TYPE()
286 s->regs[saddr] = val; in OBJECT_DECLARE_SIMPLE_TYPE()
292 s->regs[BONITO_INTENSET] = val; in OBJECT_DECLARE_SIMPLE_TYPE()
293 s->regs[BONITO_INTEN] |= val; in OBJECT_DECLARE_SIMPLE_TYPE()
296 s->regs[BONITO_INTENCLR] = val; in OBJECT_DECLARE_SIMPLE_TYPE()
297 s->regs[BONITO_INTEN] &= ~val; in OBJECT_DECLARE_SIMPLE_TYPE()
320 return s->regs[saddr]; in bonito_readl()
322 return s->regs[saddr]; in bonito_readl()
343 d->config_write(d, addr, val, 4); in bonito_pciconf_writel()
354 return d->config_read(d, addr, 4); in bonito_pciconf_readl()
357 /* north bridge PCI configure space. 0x1fe0 0000 - 0x1fe0 00ff */
375 if (addr >= sizeof(s->bonldma)) { in bonito_ldma_readl()
379 val = ((uint32_t *)(&s->bonldma))[addr / sizeof(uint32_t)]; in bonito_ldma_readl()
389 if (addr >= sizeof(s->bonldma)) { in bonito_ldma_writel()
393 ((uint32_t *)(&s->bonldma))[addr / sizeof(uint32_t)] = val & 0xffffffff; in bonito_ldma_writel()
412 if (addr >= sizeof(s->boncop)) { in bonito_cop_readl()
416 val = ((uint32_t *)(&s->boncop))[addr / sizeof(uint32_t)]; in bonito_cop_readl()
426 if (addr >= sizeof(s->boncop)) { in bonito_cop_writel()
430 ((uint32_t *)(&s->boncop))[addr / sizeof(uint32_t)] = val & 0xffffffff; in bonito_cop_writel()
446 PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); in bonito_sbridge_pciaddr()
455 if ((s->regs[BONITO_PCIMAP_CFG] & 0x10000) != 0x0) { in bonito_sbridge_pciaddr()
460 cfgaddr |= (s->regs[BONITO_PCIMAP_CFG] & 0xffff) << 16; in bonito_sbridge_pciaddr()
470 ",pcimap_cfg=0x%x", addr, s->regs[BONITO_PCIMAP_CFG]); in bonito_sbridge_pciaddr()
473 pciaddr = PCI_ADDR(pci_bus_num(phb->bus), devno, funno, regno); in bonito_sbridge_pciaddr()
475 cfgaddr, pciaddr, pci_bus_num(phb->bus), devno, funno, regno); in bonito_sbridge_pciaddr()
485 PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); in bonito_spciconf_write()
501 /* set the pci address in s->config_reg */ in bonito_spciconf_write()
502 phb->config_reg = (pciaddr) | (1u << 31); in bonito_spciconf_write()
503 pci_data_write(phb->bus, phb->config_reg, val, size); in bonito_spciconf_write()
506 status = pci_get_word(d->config + PCI_STATUS); in bonito_spciconf_write()
508 pci_set_word(d->config + PCI_STATUS, status); in bonito_spciconf_write()
515 PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); in bonito_spciconf_read()
530 /* set the pci address in s->config_reg */ in bonito_spciconf_read()
531 phb->config_reg = (pciaddr) | (1u << 31); in bonito_spciconf_read()
534 status = pci_get_word(d->config + PCI_STATUS); in bonito_spciconf_read()
536 pci_set_word(d->config + PCI_STATUS, status); in bonito_spciconf_read()
538 return pci_data_read(phb->bus, phb->config_reg, size); in bonito_spciconf_read()
541 /* south bridge PCI configure space. 0x1fe8 0000 - 0x1fef ffff */
557 qemu_irq *pic = s->pic; in pci_bonito_set_irq()
558 PCIBonitoState *bonito_state = s->pci_dev; in pci_bonito_set_irq()
559 int internal_irq = irq_num - BONITO_IRQ_BASE; in pci_bonito_set_irq()
561 if (bonito_state->regs[BONITO_INTEDGE] & (1 << internal_irq)) { in pci_bonito_set_irq()
564 if (bonito_state->regs[BONITO_INTPOL] & (1 << internal_irq)) { in pci_bonito_set_irq()
577 slot = PCI_SLOT(pci_dev->devfn); in pci_bonito_map_irq()
587 return (slot - 8 + irq_num) + 6 + BONITO_IRQ_BASE; in pci_bonito_map_irq()
600 s->regs[BONITO_BONPONCFG] = 0xc40; in bonito_reset_hold()
606 s->regs[BONITO_BONGENCFG] = val; in bonito_reset_hold()
608 s->regs[BONITO_IODEVCFG] = 0x2bff8010; in bonito_reset_hold()
609 s->regs[BONITO_SDCFG] = 0x255e0091; in bonito_reset_hold()
611 s->regs[BONITO_GPIODATA] = 0x1ff; in bonito_reset_hold()
612 s->regs[BONITO_GPIOIE] = 0x1ff; in bonito_reset_hold()
613 s->regs[BONITO_DQCFG] = 0x8; in bonito_reset_hold()
614 s->regs[BONITO_MEMSIZE] = 0x10000000; in bonito_reset_hold()
615 s->regs[BONITO_PCIMAP] = 0x6140; in bonito_reset_hold()
634 memory_region_init(&bs->pci_mem, OBJECT(dev), "pci.mem", BONITO_PCIHI_SIZE); in bonito_host_realize()
635 phb->bus = pci_register_root_bus(dev, "pci", in bonito_host_realize()
637 dev, &bs->pci_mem, get_system_io(), in bonito_host_realize()
644 &bs->pci_mem, i * 64 * MiB, 64 * MiB); in bonito_host_realize()
658 PCIHostState *phb = PCI_HOST_BRIDGE(s->pcihost); in bonito_pci_realize()
659 BonitoState *bs = s->pcihost; in bonito_pci_realize()
663 * Bonito North Bridge, built on FPGA, in bonito_pci_realize()
666 pci_config_set_prog_interface(dev->config, 0x00); in bonito_pci_realize()
669 memory_region_init_io(&s->iomem, OBJECT(s), &bonito_ops, s, in bonito_pci_realize()
670 "north-bridge-register", BONITO_INTERNAL_REG_SIZE); in bonito_pci_realize()
671 memory_region_add_subregion(host_mem, BONITO_INTERNAL_REG_BASE, &s->iomem); in bonito_pci_realize()
674 memory_region_init_io(&phb->conf_mem, OBJECT(s), &bonito_pciconf_ops, s, in bonito_pci_realize()
675 "north-bridge-pci-config", BONITO_PCICONFIG_SIZE); in bonito_pci_realize()
677 &phb->conf_mem); in bonito_pci_realize()
680 memory_region_init_io(&phb->data_mem, OBJECT(s), &bonito_spciconf_ops, s, in bonito_pci_realize()
681 "south-bridge-pci-config", BONITO_SPCICONFIG_SIZE); in bonito_pci_realize()
683 &phb->data_mem); in bonito_pci_realize()
687 memory_region_init_io(&s->iomem_ldma, OBJECT(s), &bonito_ldma_ops, s, in bonito_pci_realize()
689 memory_region_add_subregion(host_mem, 0x1fe00200, &s->iomem_ldma); in bonito_pci_realize()
692 memory_region_init_io(&s->iomem_cop, OBJECT(s), &bonito_cop_ops, s, in bonito_pci_realize()
694 memory_region_add_subregion(host_mem, 0x1fe00300, &s->iomem_cop); in bonito_pci_realize()
698 /* Map PCI IO Space 0x1fd0 0000 - 0x1fd1 0000 */ in bonito_pci_realize()
699 memory_region_init_alias(&s->bonito_pciio, OBJECT(s), "isa_mmio", in bonito_pci_realize()
702 &s->bonito_pciio); in bonito_pci_realize()
706 memory_region_init_alias(&s->bonito_localio, OBJECT(s), "IOCS[0]", in bonito_pci_realize()
709 &s->bonito_localio); in bonito_pci_realize()
718 &bs->pci_mem, 0, BONITO_PCIHI_SIZE); in bonito_pci_realize()
725 pci_set_word(dev->config + PCI_COMMAND, 0x0000); in bonito_pci_realize()
726 pci_set_word(dev->config + PCI_STATUS, 0x0000); in bonito_pci_realize()
727 pci_set_word(dev->config + PCI_SUBSYSTEM_VENDOR_ID, 0x0000); in bonito_pci_realize()
728 pci_set_word(dev->config + PCI_SUBSYSTEM_ID, 0x0000); in bonito_pci_realize()
730 pci_set_byte(dev->config + PCI_INTERRUPT_LINE, 0x00); in bonito_pci_realize()
731 pci_config_set_interrupt_pin(dev->config, 0x01); /* interrupt pin A */ in bonito_pci_realize()
733 pci_set_byte(dev->config + PCI_MIN_GNT, 0x3c); in bonito_pci_realize()
734 pci_set_byte(dev->config + PCI_MAX_LAT, 0x00); in bonito_pci_realize()
748 pcihost->pic = pic; in bonito_init()
753 s->pcihost = pcihost; in bonito_init()
754 pcihost->pci_dev = s; in bonito_init()
755 pci_realize_and_unref(d, phb->bus, &error_fatal); in bonito_init()
757 return phb->bus; in bonito_init()
766 rc->phases.hold = bonito_reset_hold; in bonito_pci_class_init()
767 k->realize = bonito_pci_realize; in bonito_pci_class_init()
768 k->vendor_id = 0xdf53; in bonito_pci_class_init()
769 k->device_id = 0x00d5; in bonito_pci_class_init()
770 k->revision = 0x01; in bonito_pci_class_init()
771 k->class_id = PCI_CLASS_BRIDGE_HOST; in bonito_pci_class_init()
772 dc->desc = "Host bridge"; in bonito_pci_class_init()
773 dc->vmsd = &vmstate_bonito; in bonito_pci_class_init()
775 * PCI-facing part of the host bridge, not usable without the in bonito_pci_class_init()
776 * host-facing part, which can't be device_add'ed, yet. in bonito_pci_class_init()
778 dc->user_creatable = false; in bonito_pci_class_init()
796 dc->realize = bonito_host_realize; in bonito_host_class_init()