Lines Matching +full:cpu +full:- +full:interrupt +full:- +full:controller
2 * SPDX-License-Identifier: GPL-2.0-or-later
10 #include "qemu/error-report.h"
11 #include "qemu/guest-random.h"
13 #include "cpu.h"
14 #include "system/address-spaces.h"
17 #include "hw/char/serial-mm.h"
18 #include "hw/core/split-irq.h"
22 #include "hw/pci-host/gpex.h"
23 #include "hw/qdev-properties.h"
26 #include "hw/virtio/virtio-mmio.h"
94 OpenRISCCPU *cpu = opaque; in main_cpu_reset() local
95 CPUState *cs = CPU(cpu); in main_cpu_reset()
97 cpu_reset(CPU(cpu)); in main_cpu_reset()
100 cpu_set_gpr(&cpu->env, 3, boot_info.fdt_addr); in main_cpu_reset()
114 qdev_prop_set_uint32(splitter, "num-lines", num_cpus); in get_per_cpu_irq()
132 int cpu; in openrisc_create_fdt() local
136 fdt = state->fdt = create_device_tree(&state->fdt_size); in openrisc_create_fdt()
143 qemu_fdt_setprop_cell(fdt, "/", "#address-cells", 0x1); in openrisc_create_fdt()
144 qemu_fdt_setprop_cell(fdt, "/", "#size-cells", 0x1); in openrisc_create_fdt()
148 qemu_fdt_setprop_string(fdt, "/soc", "compatible", "simple-bus"); in openrisc_create_fdt()
149 qemu_fdt_setprop_cell(fdt, "/soc", "#address-cells", 0x1); in openrisc_create_fdt()
150 qemu_fdt_setprop_cell(fdt, "/soc", "#size-cells", 0x1); in openrisc_create_fdt()
161 qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0x0); in openrisc_create_fdt()
162 qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1); in openrisc_create_fdt()
164 for (cpu = 0; cpu < num_cpus; cpu++) { in openrisc_create_fdt()
165 nodename = g_strdup_printf("/cpus/cpu@%d", cpu); in openrisc_create_fdt()
168 "opencores,or1200-rtlsvn481"); in openrisc_create_fdt()
169 qemu_fdt_setprop_cell(fdt, nodename, "reg", cpu); in openrisc_create_fdt()
170 qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", in openrisc_create_fdt()
179 "opencores,or1k-pic-level"); in openrisc_create_fdt()
180 qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells", 1); in openrisc_create_fdt()
181 qemu_fdt_setprop(fdt, nodename, "interrupt-controller", NULL, 0); in openrisc_create_fdt()
184 qemu_fdt_setprop_cell(fdt, "/", "interrupt-parent", *pic_phandle); in openrisc_create_fdt()
193 qemu_fdt_setprop(fdt, "/chosen", "rng-seed", rng_seed, sizeof(rng_seed)); in openrisc_create_fdt()
203 void *fdt = state->fdt; in openrisc_virt_ompic_init()
209 dev = qdev_new("or1k-ompic"); in openrisc_virt_ompic_init()
210 qdev_prop_set_uint32(dev, "num-cpus", num_cpus); in openrisc_virt_ompic_init()
224 qemu_fdt_setprop(fdt, nodename, "interrupt-controller", NULL, 0); in openrisc_virt_ompic_init()
225 qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells", 0); in openrisc_virt_ompic_init()
234 void *fdt = state->fdt; in openrisc_virt_serial_init()
247 qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", VIRT_CLK_MHZ); in openrisc_virt_serial_init()
248 qemu_fdt_setprop(fdt, nodename, "big-endian", NULL, 0); in openrisc_virt_serial_init()
251 qemu_fdt_setprop_string(fdt, "/chosen", "stdout-path", nodename); in openrisc_virt_serial_init()
259 void *fdt = state->fdt; in openrisc_virt_test_init()
273 qemu_fdt_setprop(fdt, nodename, "big-endian", NULL, 0); in openrisc_virt_test_init()
278 qemu_fdt_setprop_string(fdt, nodename, "compatible", "syscon-reboot"); in openrisc_virt_test_init()
286 qemu_fdt_setprop_string(fdt, nodename, "compatible", "syscon-poweroff"); in openrisc_virt_test_init()
298 void *fdt = state->fdt; in openrisc_virt_rtc_init()
309 "google,goldfish-rtc"); in openrisc_virt_rtc_init()
326 * each device's first interrupt is based on it's PCI_SLOT number. in create_pcie_irq_map()
329 * We only need one entry per interrupt in the table (not one per in create_pcie_irq_map()
330 * possible slot) seeing the interrupt-map-mask will allow the table in create_pcie_irq_map()
345 /* Fill PCI Interrupt cells */ in create_pcie_irq_map()
348 /* Fill interrupt controller phandle and cells */ in create_pcie_irq_map()
359 qemu_fdt_setprop(fdt, nodename, "interrupt-map", full_irq_map, in create_pcie_irq_map()
363 qemu_fdt_setprop_cells(fdt, nodename, "interrupt-map-mask", in create_pcie_irq_map()
374 void *fdt = state->fdt; in openrisc_virt_pcie_init()
388 memory_region_init_alias(alias, OBJECT(dev), "pcie-ecam", in openrisc_virt_pcie_init()
400 memory_region_init_alias(alias, OBJECT(dev), "pcie-mmio", in openrisc_virt_pcie_init()
407 memory_region_init_alias(alias, OBJECT(dev), "pcie-pio", in openrisc_virt_pcie_init()
421 qemu_fdt_setprop_cell(fdt, nodename, "#interrupt-cells", 1); in openrisc_virt_pcie_init()
422 qemu_fdt_setprop_cell(fdt, nodename, "#address-cells", 3); in openrisc_virt_pcie_init()
423 qemu_fdt_setprop_cell(fdt, nodename, "#size-cells", 2); in openrisc_virt_pcie_init()
425 "pci-host-ecam-generic"); in openrisc_virt_pcie_init()
427 qemu_fdt_setprop_cell(fdt, nodename, "linux,pci-domain", 0); in openrisc_virt_pcie_init()
428 qemu_fdt_setprop_cells(fdt, nodename, "bus-range", 0, in openrisc_virt_pcie_init()
429 ecam_size / PCIE_MMCFG_SIZE_MIN - 1); in openrisc_virt_pcie_init()
430 qemu_fdt_setprop(fdt, nodename, "dma-coherent", NULL, 0); in openrisc_virt_pcie_init()
432 /* pci-address(3) cpu-address(1) pci-size(2) */ in openrisc_virt_pcie_init()
447 void *fdt = state->fdt; in openrisc_virt_virtio_init()
455 qdev_prop_set_bit(dev, "force-legacy", false); in openrisc_virt_virtio_init()
472 ram_addr_t ram_size = machine->ram_size; in openrisc_virt_init()
473 const char *kernel_filename = machine->kernel_filename; in openrisc_virt_init()
479 unsigned int smp_cpus = machine->smp.cpus; in openrisc_virt_init()
484 cpus[n] = OPENRISC_CPU(cpu_create(machine->cpu_type)); in openrisc_virt_init()
486 fprintf(stderr, "Unable to find CPU definition!\n"); in openrisc_virt_init()
497 openrisc_create_fdt(state, virt_memmap, smp_cpus, machine->ram_size, in openrisc_virt_init()
498 machine->kernel_cmdline, &pic_phandle); in openrisc_virt_init()
536 if (machine->initrd_filename) { in openrisc_virt_init()
537 load_addr = openrisc_load_initrd(state->fdt, in openrisc_virt_init()
538 machine->initrd_filename, in openrisc_virt_init()
539 load_addr, machine->ram_size); in openrisc_virt_init()
541 boot_info.fdt_addr = openrisc_load_fdt(machine, state->fdt, load_addr, in openrisc_virt_init()
542 machine->ram_size); in openrisc_virt_init()
550 mc->desc = "or1k virtual machine"; in openrisc_virt_machine_init()
551 mc->init = openrisc_virt_init; in openrisc_virt_machine_init()
552 mc->max_cpus = VIRT_CPUS_MAX; in openrisc_virt_machine_init()
553 mc->is_default = false; in openrisc_virt_machine_init()
554 mc->default_cpu_type = OPENRISC_CPU_TYPE_NAME("or1200"); in openrisc_virt_machine_init()