2  * QEMU model of the Versal eFuse controller
27 #include "hw/nvram/xlnx-versal-efuse.h"
160  * eFuse layout references:
261     uint32_t check = xlnx_efuse_tbits_check(s->efuse);  in efuse_status_tbits_sync()
275     if (!s->efuse || !s->efuse->init_tbits) {  in efuse_anchor_bits_check()
279     for (page = 0; page < s->efuse->efuse_nr; page++) {  in efuse_anchor_bits_check()
286         if (!xlnx_efuse_get_bit(s->efuse, bit)) {  in efuse_anchor_bits_check()
287             xlnx_efuse_set_bit(s->efuse, bit);  in efuse_anchor_bits_check()
291         if (!xlnx_efuse_get_bit(s->efuse, bit)) {  in efuse_anchor_bits_check()
292             xlnx_efuse_set_bit(s->efuse, bit);  in efuse_anchor_bits_check()
310     lk_bits = xlnx_efuse_get_row(s->efuse, EFUSE_KEY_CRC_LK_ROW) & lk_mask;  in efuse_key_crc_check()
311     if (lk_bits == 0 && xlnx_efuse_k256_check(s->efuse, crc, first)) {  in efuse_key_crc_check()
415     /* Row lock by an efuse bit */  in efuse_pgm_locked()
417         lock = xlnx_efuse_get_bit(s->efuse, lock);  in efuse_pgm_locked()
446                       "%s: Denied setting of efuse<%u, %u, %u>\n",  in efuse_pgm_addr_postw()
451     } else if (xlnx_efuse_set_bit(s->efuse, bit)) {  in efuse_pgm_addr_postw()
481     s->regs[R_EFUSE_RD_DATA] = xlnx_versal_efuse_read_row(s->efuse,  in efuse_rd_addr_postw()
487                       "%s: Denied reading of efuse<%u, %u>\n",  in efuse_rd_addr_postw()
689     if (!s->efuse) {  in efuse_ctrl_realize()
692         error_setg(errp, "%s.efuse: link property not connected to XLNX-EFUSE",  in efuse_ctrl_realize()
746     DEFINE_PROP_LINK("efuse",
747                      XlnxVersalEFuseCtrl, efuse,
784 uint32_t xlnx_versal_efuse_read_row(XlnxEFuse *efuse,  in type_init()
799     return xlnx_efuse_get_row(efuse, bit);  in type_init()