hw/net/vmxnet3.h

14  * See the COPYING file in the top-level directory.
53  * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
67  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
72  * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
77     u64            TSOPktsTxOK;  /* TSO pkts post-segmentation */
92     /* the following counters are for pkts from the wire, i.e., pre-LRO */
168 #define VMXNET3_REG_ALIGN       8    /* All registers are 8-byte aligned. */
209  *    Little Endian layout of bitfields -
215  *    Big Endian layout of bitfields -
232             u32 msscof:14;  /* MSS, checksum offset, flags */
237             u32 len:14;
239             u32 len:14;
244             u32 msscof:14;  /* MSS, checksum offset, flags */
259             u32 hlen:10;    /* header len */
261             u32 hlen:10;    /* header len */
282 #define VMXNET3_TXD_GEN_SHIFT    14
344             u32 len:14;
346             u32 len:14;
363 #define VMXNET3_RXD_BTYPE_SHIFT  14
373             u32 rqID:10;      /* rx queue/ring ID */
383             u32 rqID:10;      /* rx queue/ring ID */
400             u32 len:14;       /* data length */
402             u32 len:14;       /* data length */
481 #define VMXNET3_MAX_TX_BUF_SIZE  (1 << 14)
484 #define VMXNET3_TXD_NEEDED(size) (((size) + VMXNET3_MAX_TX_BUF_SIZE - 1) / \
487 /* max # of tx descs for a non-tso pkt */
491 #define VMXNET3_MAX_RX_BUF_SIZE  ((1 << 14) - 1)
498 #define VMXNET3_RING_BA_MASK    (VMXNET3_RING_BA_ALIGN - 1)
502 #define VMXNET3_RING_SIZE_MASK  (VMXNET3_RING_SIZE_ALIGN - 1)
542     u32        gosMisc:10;    /* other info about gos */
545     u32        gosBits:2;    /* 32-bit or 64-bit? */
547     u32        gosBits:2;     /* 32-bit or 64-bit? */
550     u32        gosMisc:10;    /* other info about gos */
744     /* read-only region for device, read by dev in response to a SET cmd */
793 #define VMXNET3_LINK_UP         (10000 << 16 | 1)    /* 10 Gbps, up */