Lines Matching +full:post +full:- +full:processing
7 * Copyright 2017 Mark Cave-Ayland
12 #include "hw/qdev-properties.h"
170 #define MIF_CFG_MDI0 0x00000100 /* MDIO_0 present or read-bit */
171 #define MIF_CFG_MDI1 0x00000200 /* MDIO_1 present or read-bit */
243 mask = s->gregs[GREG_IMASK >> 2]; in sungem_eval_irq()
244 stat = s->gregs[GREG_STAT >> 2] & ~GREG_STAT_TXNR; in sungem_eval_irq()
256 stat = s->gregs[GREG_STAT >> 2]; in sungem_update_status()
262 s->gregs[GREG_STAT >> 2] = stat; in sungem_update_status()
270 mask = s->macregs[MAC_TXSTAT >> 2]; in sungem_eval_cascade_irq()
271 stat = s->macregs[MAC_TXMASK >> 2]; in sungem_eval_cascade_irq()
278 mask = s->macregs[MAC_RXSTAT >> 2]; in sungem_eval_cascade_irq()
279 stat = s->macregs[MAC_RXMASK >> 2]; in sungem_eval_cascade_irq()
286 mask = s->macregs[MAC_CSTAT >> 2]; in sungem_eval_cascade_irq()
287 stat = s->macregs[MAC_MCMASK >> 2] & ~MAC_CSTAT_PTR; in sungem_eval_cascade_irq()
300 start = (s->tx_first_ctl & TXDCTRL_CSTART) >> 15; in sungem_do_tx_csum()
301 off = (s->tx_first_ctl & TXDCTRL_COFF) >> 21; in sungem_do_tx_csum()
305 if (start > (s->tx_size - 2) || off > (s->tx_size - 2)) { in sungem_do_tx_csum()
310 csum = net_raw_checksum(s->tx_data + start, s->tx_size - start); in sungem_do_tx_csum()
311 stw_be_p(s->tx_data + off, csum); in sungem_do_tx_csum()
317 NetClientState *nc = qemu_get_queue(s->nic); in sungem_send_packet()
319 if (s->macregs[MAC_XIFCFG >> 2] & MAC_XIFCFG_LBCK) { in sungem_send_packet()
335 if (desc->control_word & TXDCTRL_SOF) { in sungem_process_tx_desc()
336 if (s->tx_first_ctl) { in sungem_process_tx_desc()
339 s->tx_size = 0; in sungem_process_tx_desc()
340 s->tx_first_ctl = desc->control_word; in sungem_process_tx_desc()
344 len = desc->control_word & TXDCTRL_BUFSZ; in sungem_process_tx_desc()
347 if ((s->tx_size + len) > MAX_PACKET_SIZE) { in sungem_process_tx_desc()
349 len = MAX_PACKET_SIZE - s->tx_size; in sungem_process_tx_desc()
353 pci_dma_read(d, desc->buffer, &s->tx_data[s->tx_size], len); in sungem_process_tx_desc()
354 s->tx_size += len; in sungem_process_tx_desc()
357 if (desc->control_word & TXDCTRL_EOF) { in sungem_process_tx_desc()
358 trace_sungem_tx_finished(s->tx_size); in sungem_process_tx_desc()
361 if (s->tx_first_ctl & TXDCTRL_CENAB) { in sungem_process_tx_desc()
366 sungem_send_packet(s, s->tx_data, s->tx_size); in sungem_process_tx_desc()
369 s->tx_size = 0; in sungem_process_tx_desc()
370 s->tx_first_ctl = 0; in sungem_process_tx_desc()
384 * handle DMA-less direct FIFO operations (we don't emulate in sungem_tx_kick()
390 txdma_cfg = s->txdmaregs[TXDMA_CFG >> 2]; in sungem_tx_kick()
391 txmac_cfg = s->macregs[MAC_TXCFG >> 2]; in sungem_tx_kick()
401 dbase = s->txdmaregs[TXDMA_DBHI >> 2]; in sungem_tx_kick()
402 dbase = (dbase << 32) | s->txdmaregs[TXDMA_DBLOW >> 2]; in sungem_tx_kick()
404 comp = s->txdmaregs[TXDMA_TXDONE >> 2] & s->tx_mask; in sungem_tx_kick()
405 kick = s->txdmaregs[TXDMA_KICK >> 2] & s->tx_mask; in sungem_tx_kick()
407 trace_sungem_tx_process(comp, kick, s->tx_mask + 1); in sungem_tx_kick()
424 /* Send it for processing */ in sungem_tx_kick()
435 comp = (comp + 1) & s->tx_mask; in sungem_tx_kick()
436 s->txdmaregs[TXDMA_TXDONE >> 2] = comp; in sungem_tx_kick()
445 return kick == ((done + 1) & s->rx_mask); in sungem_rx_full()
454 rxmac_cfg = s->macregs[MAC_RXCFG >> 2]; in sungem_can_receive()
455 rxdma_cfg = s->rxdmaregs[RXDMA_CFG >> 2]; in sungem_can_receive()
468 kick = s->rxdmaregs[RXDMA_KICK >> 2]; in sungem_can_receive()
469 done = s->rxdmaregs[RXDMA_DONE >> 2]; in sungem_can_receive()
489 uint32_t rxcfg = s->macregs[MAC_RXCFG >> 2]; in sungem_check_rx_mac()
528 hash = s->macregs[(MAC_HASH0 + idx) >> 2]; in sungem_check_rx_mac()
529 if (hash & (1 << (15 - (crc & 0xf)))) { in sungem_check_rx_mac()
537 trace_sungem_rx_mac_compare(s->macregs[MAC_ADDR0 >> 2], in sungem_check_rx_mac()
538 s->macregs[MAC_ADDR1 >> 2], in sungem_check_rx_mac()
539 s->macregs[MAC_ADDR2 >> 2]); in sungem_check_rx_mac()
541 if (mac0 == s->macregs[MAC_ADDR0 >> 2] && in sungem_check_rx_mac()
542 mac1 == s->macregs[MAC_ADDR1 >> 2] && in sungem_check_rx_mac()
543 mac2 == s->macregs[MAC_ADDR2 >> 2]) { in sungem_check_rx_mac()
548 if (mac0 == s->macregs[MAC_ADDR3 >> 2] && in sungem_check_rx_mac()
549 mac1 == s->macregs[MAC_ADDR4 >> 2] && in sungem_check_rx_mac()
550 mac2 == s->macregs[MAC_ADDR5 >> 2]) { in sungem_check_rx_mac()
570 rxmac_cfg = s->macregs[MAC_RXCFG >> 2]; in sungem_receive()
571 rxdma_cfg = s->rxdmaregs[RXDMA_CFG >> 2]; in sungem_receive()
572 max_fsize = s->macregs[MAC_MAXFSZ >> 2] & 0x7fff; in sungem_receive()
609 kick = s->rxdmaregs[RXDMA_KICK >> 2] & s->rx_mask; in sungem_receive()
610 done = s->rxdmaregs[RXDMA_DONE >> 2] & s->rx_mask; in sungem_receive()
612 trace_sungem_rx_process(done, kick, s->rx_mask + 1); in sungem_receive()
625 dbase = s->rxdmaregs[RXDMA_DBHI >> 2]; in sungem_receive()
626 dbase = (dbase << 32) | s->rxdmaregs[RXDMA_DBLOW >> 2]; in sungem_receive()
650 csum = net_raw_checksum((uint8_t *)buf + coff, size - coff); in sungem_receive()
666 done = (done + 1) & s->rx_mask; in sungem_receive()
667 s->rxdmaregs[RXDMA_DONE >> 2] = done; in sungem_receive()
693 sz = 1 << (((s->rxdmaregs[RXDMA_CFG >> 2] & RXDMA_CFG_RINGSZ) >> 1) + 5); in sungem_update_masks()
694 s->rx_mask = sz - 1; in sungem_update_masks()
696 sz = 1 << (((s->txdmaregs[TXDMA_CFG >> 2] & TXDMA_CFG_RINGSZ) >> 1) + 5); in sungem_update_masks()
697 s->tx_mask = sz - 1; in sungem_update_masks()
706 s->rxdmaregs[RXDMA_FSZ >> 2] = 0x140; in sungem_reset_rx()
707 s->rxdmaregs[RXDMA_DONE >> 2] = 0; in sungem_reset_rx()
708 s->rxdmaregs[RXDMA_KICK >> 2] = 0; in sungem_reset_rx()
709 s->rxdmaregs[RXDMA_CFG >> 2] = 0x1000010; in sungem_reset_rx()
710 s->rxdmaregs[RXDMA_PTHRESH >> 2] = 0xf8; in sungem_reset_rx()
711 s->rxdmaregs[RXDMA_BLANK >> 2] = 0; in sungem_reset_rx()
722 s->txdmaregs[TXDMA_FSZ >> 2] = 0x90; in sungem_reset_tx()
723 s->txdmaregs[TXDMA_TXDONE >> 2] = 0; in sungem_reset_tx()
724 s->txdmaregs[TXDMA_KICK >> 2] = 0; in sungem_reset_tx()
725 s->txdmaregs[TXDMA_CFG >> 2] = 0x118010; in sungem_reset_tx()
729 s->tx_size = 0; in sungem_reset_tx()
730 s->tx_first_ctl = 0; in sungem_reset_tx()
740 s->gregs[GREG_IMASK >> 2] = 0xFFFFFFF; in sungem_reset_all()
741 s->gregs[GREG_STAT >> 2] = 0; in sungem_reset_all()
743 uint8_t *ma = s->conf.macaddr.a; in sungem_reset_all()
745 s->gregs[GREG_SWRST >> 2] = 0; in sungem_reset_all()
746 s->macregs[MAC_ADDR0 >> 2] = (ma[4] << 8) | ma[5]; in sungem_reset_all()
747 s->macregs[MAC_ADDR1 >> 2] = (ma[2] << 8) | ma[3]; in sungem_reset_all()
748 s->macregs[MAC_ADDR2 >> 2] = (ma[0] << 8) | ma[1]; in sungem_reset_all()
750 s->gregs[GREG_SWRST >> 2] &= GREG_SWRST_RSTOUT; in sungem_reset_all()
752 s->mifregs[MIF_CFG >> 2] = MIF_CFG_MDI0; in sungem_reset_all()
766 if (phy_addr != s->phy_addr) { in __sungem_mii_read()
780 if (qemu_get_queue(s->nic)->link_down) { in __sungem_mii_read()
845 /* Pre-write filter */ in sungem_mmio_greg_write()
855 s->gregs[GREG_STAT >> 2] &= ~val; in sungem_mmio_greg_write()
863 s->gregs[addr >> 2] = val; in sungem_mmio_greg_write()
865 /* Post write action */ in sungem_mmio_greg_write()
868 /* Re-evaluate interrupt */ in sungem_mmio_greg_write()
898 val = s->gregs[addr >> 2]; in sungem_mmio_greg_read()
905 s->gregs[GREG_STAT >> 2] &= ~GREG_STAT_LATCH; in sungem_mmio_greg_read()
910 (s->txdmaregs[TXDMA_TXDONE >> 2] << GREG_STAT_TXNR_SHIFT); in sungem_mmio_greg_read()
916 val = (s->gregs[GREG_STAT >> 2] & ~GREG_STAT_TXNR) | in sungem_mmio_greg_read()
917 (s->txdmaregs[TXDMA_TXDONE >> 2] << GREG_STAT_TXNR_SHIFT); in sungem_mmio_greg_read()
948 /* Pre-write filter */ in sungem_mmio_txdma_write()
961 s->txdmaregs[addr >> 2] = val; in sungem_mmio_txdma_write()
963 /* Post write action */ in sungem_mmio_txdma_write()
986 val = s->txdmaregs[addr >> 2]; in sungem_mmio_txdma_read()
1017 /* Pre-write filter */ in sungem_mmio_rxdma_write()
1030 s->rxdmaregs[addr >> 2] = val; in sungem_mmio_rxdma_write()
1032 /* Post write action */ in sungem_mmio_rxdma_write()
1039 if ((s->macregs[MAC_RXCFG >> 2] & MAC_RXCFG_ENAB) != 0 && in sungem_mmio_rxdma_write()
1040 (s->rxdmaregs[RXDMA_CFG >> 2] & RXDMA_CFG_ENABLE) != 0) { in sungem_mmio_rxdma_write()
1041 qemu_flush_queued_packets(qemu_get_queue(s->nic)); in sungem_mmio_rxdma_write()
1059 val = s->rxdmaregs[addr >> 2]; in sungem_mmio_rxdma_read()
1094 uint32_t val = -1; in sungem_mmio_wol_read()
1127 /* Pre-write filter */ in sungem_mmio_mac_write()
1130 case MAC_TXRST: /* Not technically read-only but will do for now */ in sungem_mmio_mac_write()
1131 case MAC_RXRST: /* Not technically read-only but will do for now */ in sungem_mmio_mac_write()
1139 /* 10-bits implemented */ in sungem_mmio_mac_write()
1144 s->macregs[addr >> 2] = val; in sungem_mmio_mac_write()
1146 /* Post write action */ in sungem_mmio_mac_write()
1155 if ((s->macregs[MAC_RXCFG >> 2] & MAC_RXCFG_ENAB) != 0 && in sungem_mmio_mac_write()
1156 (s->rxdmaregs[RXDMA_CFG >> 2] & RXDMA_CFG_ENABLE) != 0) { in sungem_mmio_mac_write()
1157 qemu_flush_queued_packets(qemu_get_queue(s->nic)); in sungem_mmio_mac_write()
1175 val = s->macregs[addr >> 2]; in sungem_mmio_mac_read()
1182 s->macregs[addr >> 2] = 0; in sungem_mmio_mac_read()
1187 s->macregs[addr >> 2] = 0; in sungem_mmio_mac_read()
1192 s->macregs[addr >> 2] &= MAC_CSTAT_PTR; in sungem_mmio_mac_read()
1224 /* Pre-write filter */ in sungem_mmio_mif_write()
1237 s->mifregs[addr >> 2] = val; in sungem_mmio_mif_write()
1239 /* Post write action */ in sungem_mmio_mif_write()
1242 s->mifregs[addr >> 2] = sungem_mii_op(s, val); in sungem_mmio_mif_write()
1259 val = s->mifregs[addr >> 2]; in sungem_mmio_mif_read()
1290 /* Pre-write filter */ in sungem_mmio_pcs_write()
1299 s->pcsregs[addr >> 2] = val; in sungem_mmio_pcs_write()
1314 val = s->pcsregs[addr >> 2]; in sungem_mmio_pcs_read()
1335 qemu_del_nic(s->nic); in sungem_uninit()
1352 pci_conf = pci_dev->config; in sungem_realize()
1367 memory_region_init(&s->sungem, OBJECT(s), "sungem", SUNGEM_MMIO_SIZE); in sungem_realize()
1369 memory_region_init_io(&s->greg, OBJECT(s), &sungem_mmio_greg_ops, s, in sungem_realize()
1371 memory_region_add_subregion(&s->sungem, 0, &s->greg); in sungem_realize()
1373 memory_region_init_io(&s->txdma, OBJECT(s), &sungem_mmio_txdma_ops, s, in sungem_realize()
1375 memory_region_add_subregion(&s->sungem, 0x2000, &s->txdma); in sungem_realize()
1377 memory_region_init_io(&s->rxdma, OBJECT(s), &sungem_mmio_rxdma_ops, s, in sungem_realize()
1379 memory_region_add_subregion(&s->sungem, 0x4000, &s->rxdma); in sungem_realize()
1381 memory_region_init_io(&s->wol, OBJECT(s), &sungem_mmio_wol_ops, s, in sungem_realize()
1383 memory_region_add_subregion(&s->sungem, 0x3000, &s->wol); in sungem_realize()
1385 memory_region_init_io(&s->mac, OBJECT(s), &sungem_mmio_mac_ops, s, in sungem_realize()
1387 memory_region_add_subregion(&s->sungem, 0x6000, &s->mac); in sungem_realize()
1389 memory_region_init_io(&s->mif, OBJECT(s), &sungem_mmio_mif_ops, s, in sungem_realize()
1391 memory_region_add_subregion(&s->sungem, 0x6200, &s->mif); in sungem_realize()
1393 memory_region_init_io(&s->pcs, OBJECT(s), &sungem_mmio_pcs_ops, s, in sungem_realize()
1395 memory_region_add_subregion(&s->sungem, 0x9000, &s->pcs); in sungem_realize()
1397 pci_register_bar(pci_dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->sungem); in sungem_realize()
1399 qemu_macaddr_default_if_unset(&s->conf.macaddr); in sungem_realize()
1400 s->nic = qemu_new_nic(&net_sungem_info, &s->conf, in sungem_realize()
1402 dev->id, &dev->mem_reentrancy_guard, s); in sungem_realize()
1403 qemu_format_nic_info_str(qemu_get_queue(s->nic), in sungem_realize()
1404 s->conf.macaddr.a); in sungem_realize()
1418 device_add_bootindex_property(obj, &s->conf.bootindex, in sungem_instance_init()
1419 "bootindex", "/ethernet-phy@0", in sungem_instance_init()
1462 k->realize = sungem_realize; in sungem_class_init()
1463 k->exit = sungem_uninit; in sungem_class_init()
1464 k->vendor_id = PCI_VENDOR_ID_APPLE; in sungem_class_init()
1465 k->device_id = PCI_DEVICE_ID_APPLE_UNI_N_GMAC; in sungem_class_init()
1466 k->revision = 0x01; in sungem_class_init()
1467 k->class_id = PCI_CLASS_NETWORK_ETHERNET; in sungem_class_init()
1468 dc->vmsd = &vmstate_sungem; in sungem_class_init()
1471 set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); in sungem_class_init()