Lines Matching +full:flags +full:- +full:mask
17 #include "hw/qdev-properties.h"
77 /* Map interrupt flags onto IRQ lines. */
96 uint16_t flags; member
178 be16_to_cpus(&bd->flags); in mcf_fec_read_bd()
179 be16_to_cpus(&bd->length); in mcf_fec_read_bd()
180 be32_to_cpus(&bd->data); in mcf_fec_read_bd()
186 tmp.flags = cpu_to_be16(bd->flags); in mcf_fec_write_bd()
187 tmp.length = cpu_to_be16(bd->length); in mcf_fec_write_bd()
188 tmp.data = cpu_to_be32(bd->data); in mcf_fec_write_bd()
196 uint32_t mask; in mcf_fec_update() local
199 active = s->eir & s->eimr; in mcf_fec_update()
200 changed = active ^s->irq_state; in mcf_fec_update()
202 mask = mcf_fec_irq_map[i]; in mcf_fec_update()
203 if (changed & mask) { in mcf_fec_update()
204 DPRINTF("IRQ %d = %d\n", i, (active & mask) != 0); in mcf_fec_update()
205 qemu_set_irq(s->irq[i], (active & mask) != 0); in mcf_fec_update()
208 s->irq_state = active; in mcf_fec_update()
213 s->mib[MIB_RMON_T_PACKETS]++; in mcf_fec_tx_stats()
214 s->mib[MIB_RMON_T_OCTETS] += size; in mcf_fec_tx_stats()
216 s->mib[MIB_RMON_T_FRAG]++; in mcf_fec_tx_stats()
218 s->mib[MIB_RMON_T_P64]++; in mcf_fec_tx_stats()
220 s->mib[MIB_RMON_T_P65TO127]++; in mcf_fec_tx_stats()
222 s->mib[MIB_RMON_T_P128TO255]++; in mcf_fec_tx_stats()
224 s->mib[MIB_RMON_T_P256TO511]++; in mcf_fec_tx_stats()
226 s->mib[MIB_RMON_T_P512TO1023]++; in mcf_fec_tx_stats()
228 s->mib[MIB_RMON_T_P1024TO2047]++; in mcf_fec_tx_stats()
230 s->mib[MIB_RMON_T_P_GTE2048]++; in mcf_fec_tx_stats()
232 s->mib[MIB_IEEE_T_FRAME_OK]++; in mcf_fec_tx_stats()
233 s->mib[MIB_IEEE_T_OCTETS_OK] += size; in mcf_fec_tx_stats()
248 addr = s->tx_descriptor; in mcf_fec_do_tx()
251 DPRINTF("tx_bd %x flags %04x len %d data %08x\n", in mcf_fec_do_tx()
252 addr, bd.flags, bd.length, bd.data); in mcf_fec_do_tx()
253 if ((bd.flags & FEC_BD_R) == 0) { in mcf_fec_do_tx()
259 len = FEC_MAX_FRAME_SIZE - frame_size; in mcf_fec_do_tx()
260 s->eir |= FEC_INT_BABT; in mcf_fec_do_tx()
265 if (bd.flags & FEC_BD_L) { in mcf_fec_do_tx()
268 qemu_send_packet(qemu_get_queue(s->nic), frame, frame_size); in mcf_fec_do_tx()
272 s->eir |= FEC_INT_TXF; in mcf_fec_do_tx()
274 s->eir |= FEC_INT_TXB; in mcf_fec_do_tx()
275 bd.flags &= ~FEC_BD_R; in mcf_fec_do_tx()
279 if ((bd.flags & FEC_BD_W) != 0) { in mcf_fec_do_tx()
280 addr = s->etdsr; in mcf_fec_do_tx()
285 s->tx_descriptor = addr; in mcf_fec_do_tx()
290 NetClientState *nc = qemu_get_queue(s->nic); in mcf_fec_enable_rx()
293 mcf_fec_read_bd(&bd, s->rx_descriptor); in mcf_fec_enable_rx()
294 s->rx_enabled = ((bd.flags & FEC_BD_E) != 0); in mcf_fec_enable_rx()
295 if (s->rx_enabled) { in mcf_fec_enable_rx()
304 s->eir = 0; in mcf_fec_reset()
305 s->eimr = 0; in mcf_fec_reset()
306 s->rx_enabled = 0; in mcf_fec_reset()
307 s->ecr = 0; in mcf_fec_reset()
308 s->mscr = 0; in mcf_fec_reset()
309 s->rcr = 0x05ee0001; in mcf_fec_reset()
310 s->tcr = 0; in mcf_fec_reset()
311 s->tfwr = 0; in mcf_fec_reset()
312 s->rfsr = 0x500; in mcf_fec_reset()
324 if (s->mmfr & MMFR_WRITE_OP) in mcf_fec_read_mdio()
325 return s->mmfr; in mcf_fec_read_mdio()
326 if (MMFR_PHYADDR(s->mmfr) != 1) in mcf_fec_read_mdio()
327 return s->mmfr |= 0xffff; in mcf_fec_read_mdio()
329 switch (MMFR_REGNUM(s->mmfr)) { in mcf_fec_read_mdio()
356 s->mmfr = (s->mmfr & ~0xffff) | v; in mcf_fec_read_mdio()
357 return s->mmfr; in mcf_fec_read_mdio()
365 case 0x004: return s->eir; in mcf_fec_read()
366 case 0x008: return s->eimr; in mcf_fec_read()
367 case 0x010: return s->rx_enabled ? (1 << 24) : 0; /* RDAR */ in mcf_fec_read()
369 case 0x024: return s->ecr; in mcf_fec_read()
371 case 0x044: return s->mscr; in mcf_fec_read()
373 case 0x084: return s->rcr; in mcf_fec_read()
374 case 0x0c4: return s->tcr; in mcf_fec_read()
376 return (s->conf.macaddr.a[0] << 24) | (s->conf.macaddr.a[1] << 16) in mcf_fec_read()
377 | (s->conf.macaddr.a[2] << 8) | s->conf.macaddr.a[3]; in mcf_fec_read()
380 return (s->conf.macaddr.a[4] << 24) | (s->conf.macaddr.a[5] << 16) | 0x8808; in mcf_fec_read()
386 case 0x144: return s->tfwr; in mcf_fec_read()
388 case 0x150: return s->rfsr; in mcf_fec_read()
389 case 0x180: return s->erdsr; in mcf_fec_read()
390 case 0x184: return s->etdsr; in mcf_fec_read()
391 case 0x188: return s->emrbr; in mcf_fec_read()
392 case 0x200 ... 0x2e0: return s->mib[(addr & 0x1ff) / 4]; in mcf_fec_read()
406 s->eir &= ~value; in mcf_fec_write()
409 s->eimr = value; in mcf_fec_write()
412 if ((s->ecr & FEC_EN) && !s->rx_enabled) { in mcf_fec_write()
418 if (s->ecr & FEC_EN) { in mcf_fec_write()
423 s->ecr = value; in mcf_fec_write()
428 if ((s->ecr & FEC_EN) == 0) { in mcf_fec_write()
429 s->rx_enabled = 0; in mcf_fec_write()
433 s->mmfr = value; in mcf_fec_write()
434 s->eir |= FEC_INT_MII; in mcf_fec_write()
437 s->mscr = value & 0xfe; in mcf_fec_write()
443 s->rcr = value & 0x07ff003f; in mcf_fec_write()
448 s->tcr = value; in mcf_fec_write()
450 s->eir |= FEC_INT_GRA; in mcf_fec_write()
453 s->conf.macaddr.a[0] = value >> 24; in mcf_fec_write()
454 s->conf.macaddr.a[1] = value >> 16; in mcf_fec_write()
455 s->conf.macaddr.a[2] = value >> 8; in mcf_fec_write()
456 s->conf.macaddr.a[3] = value; in mcf_fec_write()
459 s->conf.macaddr.a[4] = value >> 24; in mcf_fec_write()
460 s->conf.macaddr.a[5] = value >> 16; in mcf_fec_write()
472 s->tfwr = value & 3; in mcf_fec_write()
478 s->rfsr = (value & 0x3fc) | 0x400; in mcf_fec_write()
481 s->erdsr = value & ~3; in mcf_fec_write()
482 s->rx_descriptor = s->erdsr; in mcf_fec_write()
485 s->etdsr = value & ~3; in mcf_fec_write()
486 s->tx_descriptor = s->etdsr; in mcf_fec_write()
489 s->emrbr = value > 0 ? value & 0x7F0 : 0x7F0; in mcf_fec_write()
492 s->mib[(addr & 0x1ff) / 4] = value; in mcf_fec_write()
504 s->mib[MIB_RMON_R_PACKETS]++; in mcf_fec_rx_stats()
505 s->mib[MIB_RMON_R_OCTETS] += size; in mcf_fec_rx_stats()
507 s->mib[MIB_RMON_R_FRAG]++; in mcf_fec_rx_stats()
509 s->mib[MIB_RMON_R_P64]++; in mcf_fec_rx_stats()
511 s->mib[MIB_RMON_R_P65TO127]++; in mcf_fec_rx_stats()
513 s->mib[MIB_RMON_R_P128TO255]++; in mcf_fec_rx_stats()
515 s->mib[MIB_RMON_R_P256TO511]++; in mcf_fec_rx_stats()
517 s->mib[MIB_RMON_R_P512TO1023]++; in mcf_fec_rx_stats()
519 s->mib[MIB_RMON_R_P1024TO2047]++; in mcf_fec_rx_stats()
521 s->mib[MIB_RMON_R_P_GTE2048]++; in mcf_fec_rx_stats()
523 s->mib[MIB_IEEE_R_FRAME_OK]++; in mcf_fec_rx_stats()
524 s->mib[MIB_IEEE_R_OCTETS_OK] += size; in mcf_fec_rx_stats()
533 addr = s->rx_descriptor; in mcf_fec_have_receive_space()
536 if ((bd.flags & FEC_BD_E) == 0) { in mcf_fec_have_receive_space()
539 if (want < s->emrbr) { in mcf_fec_have_receive_space()
542 want -= s->emrbr; in mcf_fec_have_receive_space()
544 if ((bd.flags & FEC_BD_W) != 0) { in mcf_fec_have_receive_space()
545 addr = s->erdsr; in mcf_fec_have_receive_space()
557 uint32_t flags = 0; in mcf_fec_receive() local
566 if (!s->rx_enabled) { in mcf_fec_receive()
567 return -1; in mcf_fec_receive()
576 flags |= FEC_BD_TR | FEC_BD_LG; in mcf_fec_receive()
578 /* Frames larger than the user limit just set error flags. */ in mcf_fec_receive()
579 if (size > (s->rcr >> 16)) { in mcf_fec_receive()
580 flags |= FEC_BD_LG; in mcf_fec_receive()
586 addr = s->rx_descriptor; in mcf_fec_receive()
590 buf_len = (size <= s->emrbr) ? size: s->emrbr; in mcf_fec_receive()
592 size -= buf_len; in mcf_fec_receive()
596 buf_len += size - 4; in mcf_fec_receive()
601 cpu_physical_memory_write(buf_addr + buf_len, crc_ptr, 4 - size); in mcf_fec_receive()
602 crc_ptr += 4 - size; in mcf_fec_receive()
604 bd.flags &= ~FEC_BD_E; in mcf_fec_receive()
607 bd.flags |= flags | FEC_BD_L; in mcf_fec_receive()
608 DPRINTF("rx frame flags %04x\n", bd.flags); in mcf_fec_receive()
609 s->eir |= FEC_INT_RXF; in mcf_fec_receive()
611 s->eir |= FEC_INT_RXB; in mcf_fec_receive()
615 if ((bd.flags & FEC_BD_W) != 0) { in mcf_fec_receive()
616 addr = s->erdsr; in mcf_fec_receive()
621 s->rx_descriptor = addr; in mcf_fec_receive()
644 s->nic = qemu_new_nic(&net_mcf_fec_info, &s->conf, in mcf_fec_realize()
645 object_get_typename(OBJECT(dev)), dev->id, in mcf_fec_realize()
646 &dev->mem_reentrancy_guard, s); in mcf_fec_realize()
647 qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a); in mcf_fec_realize()
656 memory_region_init_io(&s->iomem, obj, &mcf_fec_ops, s, "fec", 0x400); in mcf_fec_instance_init()
657 sysbus_init_mmio(sbd, &s->iomem); in mcf_fec_instance_init()
659 sysbus_init_irq(sbd, &s->irq[i]); in mcf_fec_instance_init()
671 set_bit(DEVICE_CATEGORY_NETWORK, dc->categories); in mcf_fec_class_init()
672 dc->realize = mcf_fec_realize; in mcf_fec_class_init()
673 dc->desc = "MCF Fast Ethernet Controller network device"; in mcf_fec_class_init()