84 #define IGB_CAP_SRIOV_OFFSET    (0x160)
85 #define IGB_VF_OFFSET           (0x80)
88 #define E1000E_MMIO_IDX     0
138     if (s->ioaddr < 0x1FFFF) {  in igb_io_get_reg_index()
143     if (s->ioaddr < 0x7FFFF) {  in igb_io_get_reg_index()
148     if (s->ioaddr < 0xFFFFF) {  in igb_io_get_reg_index()
161     uint32_t idx = 0;  in igb_io_read()
174         return 0;  in igb_io_read()
177         return 0;  in igb_io_read()
185     uint32_t idx = 0;  in igb_io_write()
267     0x0000, 0x0000, 0x0000, 0x0d34, 0xffff, 0x2010, 0xffff, 0xffff,
269     0x1040, 0xffff, 0x002b, 0x0000, 0x8086, 0x10c9, 0x0000, 0x70c3,
271     0x0004, 0x10c9, 0x5c00, 0x0000, 0x2880, 0x0014, 0x4a40, 0x0060,
273     0x6cfb, 0xc7b0, 0x0abe, 0x0403, 0x0783, 0x10a6, 0x0001, 0x0602,
275     0x0004, 0x0020, 0x0000, 0x004a, 0x2080, 0x00f5, 0x10ca, 0x0000,
277     0x0000, 0x0000, 0x4784, 0x4602, 0x0000, 0x0000, 0x1000, 0xffff,
279     0x0100, 0x4000, 0x131f, 0x4013, 0x0100, 0x4000, 0xffff, 0xffff,
281     0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x00e0, 0xffff, 0x0000,
283     0x0003,
299                     E1000E_MSIX_IDX, 0,  in igb_init_msix()
301                     E1000E_MSIX_IDX, 0x2000,  in igb_init_msix()
302                     0x70, NULL);  in igb_init_msix()
304     if (res < 0) {  in igb_init_msix()
307         for (i = 0; i < IGB_MSIX_VEC_NUM; i++) {  in igb_init_msix()
330     s->core.max_queue_num = s->conf.peers.queues ? s->conf.peers.queues - 1 : 0;  in igb_init_net_peer()
338     for (i = 0; i < s->conf.peers.queues; i++) {  in igb_init_net_peer()
349     for (i = 0; i < s->conf.peers.queues; i++) {  in igb_init_net_peer()
391     pci_dev->config[PCI_CACHE_LINE_SIZE] = 0x10;  in igb_pci_realize()
424     assert(pcie_endpoint_cap_init(pci_dev, 0xa0) > 0);  in igb_pci_realize()
428     ret = msi_init(pci_dev, 0x50, 1, true, true, NULL);  in igb_pci_realize()
433     if (igb_add_pm_capability(pci_dev, 0x40, PCI_PM_CAP_DSI) < 0) {  in igb_pci_realize()
442     if (pcie_aer_init(pci_dev, 1, 0x100, 0x40, errp) < 0) {  in igb_pci_realize()
446     pcie_ari_init(pci_dev, 0x150);  in igb_pci_realize()
508     return 0;  in igb_pre_save()
537         VMSTATE_STRUCT_ARRAY(ctx, struct igb_tx, 2, 0, igb_vmstate_tx_ctx,
559     VMSTATE_STRUCT(_f, _s, 0,                                       \
563     VMSTATE_STRUCT_ARRAY(_f, _s, _num, 0,                           \
588         VMSTATE_STRUCT_ARRAY(core.tx, IGBState, IGB_NUM_QUEUES, 0,
628                                   "bootindex", "/ethernet-phy@0",  in igb_instance_init()