424     if (!(s->phycr & FTGMAC100_PHYCR_NEW_ST_22)) {  in do_phy_new_ctl()
430     if (!(s->phycr & FTGMAC100_PHYCR_NEW_FIRE)) {  in do_phy_new_ctl()
434     reg = FTGMAC100_PHYCR_NEW_REG(s->phycr);  in do_phy_new_ctl()
435     data = FTGMAC100_PHYCR_NEW_DATA(s->phycr);  in do_phy_new_ctl()
437     switch (FTGMAC100_PHYCR_NEW_OP(s->phycr)) {  in do_phy_new_ctl()
446                       __func__, s->phycr);  in do_phy_new_ctl()
449     s->phycr &= ~FTGMAC100_PHYCR_NEW_FIRE;  in do_phy_new_ctl()
454     uint8_t reg = FTGMAC100_PHYCR_REG(s->phycr);  in do_phy_ctl()
456     if (s->phycr & FTGMAC100_PHYCR_MIIWR) {  in do_phy_ctl()
458         s->phycr &= ~FTGMAC100_PHYCR_MIIWR;  in do_phy_ctl()
459     } else if (s->phycr & FTGMAC100_PHYCR_MIIRD) {  in do_phy_ctl()
461         s->phycr &= ~FTGMAC100_PHYCR_MIIRD;  in do_phy_ctl()
464                       __func__, s->phycr);  in do_phy_ctl()
715     s->phycr = 0;  in ftgmac100_do_reset()
766         return s->phycr;  in ftgmac100_read()
880         s->phycr = value;  in ftgmac100_write()
1239         VMSTATE_UINT32(phycr, FTGMAC100State),
1300         s->phycr |= ASPEED_MII_PHYCR_FIRE;  in aspeed_mii_transition()
1303         s->phycr &= ~ASPEED_MII_PHYCR_FIRE;  in aspeed_mii_transition()
1313     if (!(s->phycr & ASPEED_MII_PHYCR_ST_22)) {  in aspeed_mii_do_phy_ctl()
1320     if (!(s->phycr & ASPEED_MII_PHYCR_FIRE)) {  in aspeed_mii_do_phy_ctl()
1324     reg = ASPEED_MII_PHYCR_REG(s->phycr);  in aspeed_mii_do_phy_ctl()
1325     data = ASPEED_MII_PHYCR_DATA(s->phycr);  in aspeed_mii_do_phy_ctl()
1327     switch (ASPEED_MII_PHYCR_OP(s->phycr)) {  in aspeed_mii_do_phy_ctl()
1336                       __func__, s->phycr);  in aspeed_mii_do_phy_ctl()
1348         return s->phycr;  in aspeed_mii_read()
1363         s->phycr = value & ~(s->phycr & ASPEED_MII_PHYCR_FIRE);  in aspeed_mii_write()
1372     aspeed_mii_transition(s, !!(s->phycr & ASPEED_MII_PHYCR_FIRE));  in aspeed_mii_write()
1388     s->phycr = 0;  in aspeed_mii_reset()
1391     aspeed_mii_transition(s, !!(s->phycr & ASPEED_MII_PHYCR_FIRE));  in aspeed_mii_reset()
1411         VMSTATE_UINT32(phycr, FTGMAC100State),