1256     memset(&desc->wb, 0, sizeof(desc->wb));  in e1000e_write_ext_rx_descr()
1258     desc->wb.upper.length = cpu_to_le16(length);  in e1000e_write_ext_rx_descr()
1262                              &desc->wb.lower.hi_dword.rss,  in e1000e_write_ext_rx_descr()
1263                              &desc->wb.lower.mrq,  in e1000e_write_ext_rx_descr()
1264                              &desc->wb.upper.status_error,  in e1000e_write_ext_rx_descr()
1265                              &desc->wb.lower.hi_dword.csum_ip.ip_id,  in e1000e_write_ext_rx_descr()
1266                              &desc->wb.upper.vlan);  in e1000e_write_ext_rx_descr()
1279     memset(&desc->wb, 0, sizeof(desc->wb));  in e1000e_write_ps_rx_descr()
1281     desc->wb.middle.length0 = cpu_to_le16((*written)[0]);  in e1000e_write_ps_rx_descr()
1284         desc->wb.upper.length[i] = cpu_to_le16((*written)[i + 1]);  in e1000e_write_ps_rx_descr()
1289                              &desc->wb.lower.hi_dword.rss,  in e1000e_write_ps_rx_descr()
1290                              &desc->wb.lower.mrq,  in e1000e_write_ps_rx_descr()
1291                              &desc->wb.middle.status_error,  in e1000e_write_ps_rx_descr()
1292                              &desc->wb.lower.hi_dword.csum_ip.ip_id,  in e1000e_write_ps_rx_descr()
1293                              &desc->wb.middle.vlan);  in e1000e_write_ps_rx_descr()
1295     desc->wb.upper.header_status =  in e1000e_write_ps_rx_descr()
1345                 wb.middle.status_error);  in e1000e_pci_dma_write_rx_desc()
1346             uint32_t status = d->wb.middle.status_error;  in e1000e_pci_dma_write_rx_desc()
1348             d->wb.middle.status_error &= ~E1000_RXD_STAT_DD;  in e1000e_pci_dma_write_rx_desc()
1352                 d->wb.middle.status_error = status;  in e1000e_pci_dma_write_rx_desc()
1358                 wb.upper.status_error);  in e1000e_pci_dma_write_rx_desc()
1359             uint32_t status = d->wb.upper.status_error;  in e1000e_pci_dma_write_rx_desc()
1361             d->wb.upper.status_error &= ~E1000_RXD_STAT_DD;  in e1000e_pci_dma_write_rx_desc()
1365                 d->wb.upper.status_error = status;  in e1000e_pci_dma_write_rx_desc()