38     "RWP", "TRBA0", "TRBA1", "0x1b", "0x1c", "0x1d", "0x1e", "LLFA",
41     "0x30", "0x31", "0x32", "0x33", "0x34", "0x35", "0x36", "0x37",
42     "0x38", "0x39", "0x3a", "0x3b", "0x3c", "0x3d", "0x3e", "DCR2" };
44 #define SONIC_CR     0x00
45 #define SONIC_DCR    0x01
46 #define SONIC_RCR    0x02
47 #define SONIC_TCR    0x03
48 #define SONIC_IMR    0x04
49 #define SONIC_ISR    0x05
50 #define SONIC_UTDA   0x06
51 #define SONIC_CTDA   0x07
52 #define SONIC_TPS    0x08
53 #define SONIC_TFC    0x09
54 #define SONIC_TSA0   0x0a
55 #define SONIC_TSA1   0x0b
56 #define SONIC_TFS    0x0c
57 #define SONIC_URDA   0x0d
58 #define SONIC_CRDA   0x0e
59 #define SONIC_CRBA0  0x0f
60 #define SONIC_CRBA1  0x10
61 #define SONIC_RBWC0  0x11
62 #define SONIC_RBWC1  0x12
63 #define SONIC_EOBC   0x13
64 #define SONIC_URRA   0x14
65 #define SONIC_RSA    0x15
66 #define SONIC_REA    0x16
67 #define SONIC_RRP    0x17
68 #define SONIC_RWP    0x18
69 #define SONIC_TRBA0  0x19
70 #define SONIC_TRBA1  0x1a
71 #define SONIC_LLFA   0x1f
72 #define SONIC_TTDA   0x20
73 #define SONIC_CEP    0x21
74 #define SONIC_CAP2   0x22
75 #define SONIC_CAP1   0x23
76 #define SONIC_CAP0   0x24
77 #define SONIC_CE     0x25
78 #define SONIC_CDP    0x26
79 #define SONIC_CDC    0x27
80 #define SONIC_SR     0x28
81 #define SONIC_WT0    0x29
82 #define SONIC_WT1    0x2a
83 #define SONIC_RSC    0x2b
84 #define SONIC_CRCT   0x2c
85 #define SONIC_FAET   0x2d
86 #define SONIC_MPT    0x2e
87 #define SONIC_MDT    0x2f
88 #define SONIC_DCR2   0x3f
90 #define SONIC_CR_HTX     0x0001
91 #define SONIC_CR_TXP     0x0002
92 #define SONIC_CR_RXDIS   0x0004
93 #define SONIC_CR_RXEN    0x0008
94 #define SONIC_CR_STP     0x0010
95 #define SONIC_CR_ST      0x0020
96 #define SONIC_CR_RST     0x0080
97 #define SONIC_CR_RRRA    0x0100
98 #define SONIC_CR_LCAM    0x0200
99 #define SONIC_CR_MASK    0x03bf
101 #define SONIC_DCR_DW     0x0020
102 #define SONIC_DCR_LBR    0x2000
103 #define SONIC_DCR_EXBUS  0x8000
105 #define SONIC_RCR_PRX    0x0001
106 #define SONIC_RCR_LBK    0x0002
107 #define SONIC_RCR_FAER   0x0004
108 #define SONIC_RCR_CRCR   0x0008
109 #define SONIC_RCR_CRS    0x0020
110 #define SONIC_RCR_LPKT   0x0040
111 #define SONIC_RCR_BC     0x0080
112 #define SONIC_RCR_MC     0x0100
113 #define SONIC_RCR_LB0    0x0200
114 #define SONIC_RCR_LB1    0x0400
115 #define SONIC_RCR_AMC    0x0800
116 #define SONIC_RCR_PRO    0x1000
117 #define SONIC_RCR_BRD    0x2000
118 #define SONIC_RCR_RNT    0x4000
120 #define SONIC_TCR_PTX    0x0001
121 #define SONIC_TCR_BCM    0x0002
122 #define SONIC_TCR_FU     0x0004
123 #define SONIC_TCR_EXC    0x0040
124 #define SONIC_TCR_CRSL   0x0080
125 #define SONIC_TCR_NCRS   0x0100
126 #define SONIC_TCR_EXD    0x0400
127 #define SONIC_TCR_CRCI   0x2000
128 #define SONIC_TCR_PINT   0x8000
130 #define SONIC_ISR_RBAE   0x0010
131 #define SONIC_ISR_RBE    0x0020
132 #define SONIC_ISR_RDE    0x0040
133 #define SONIC_ISR_TC     0x0080
134 #define SONIC_ISR_TXDN   0x0200
135 #define SONIC_ISR_PKTRX  0x0400
136 #define SONIC_ISR_PINT   0x0800
137 #define SONIC_ISR_LCD    0x1000
139 #define SONIC_DESC_EOL   0x0001
140 #define SONIC_DESC_ADDR  0xFFFE
240     int level = (s->regs[SONIC_IMR] & s->regs[SONIC_ISR]) ? 1 : 0;  in dp8393x_update_irq()
262     while (s->regs[SONIC_CDC] & 0x1f) {  in dp8393x_do_load_cam()
264         index = dp8393x_get(s, dp8393x_cdp(s), 0) & 0xf;  in dp8393x_do_load_cam()
265         s->cam[index][0] = dp8393x_get(s, dp8393x_cdp(s), 1);  in dp8393x_do_load_cam()
269                                s->cam[index][0] >> 8, s->cam[index][0] & 0xff,  in dp8393x_do_load_cam()
270                                s->cam[index][1] >> 8, s->cam[index][1] & 0xff,  in dp8393x_do_load_cam()
271                                s->cam[index][2] >> 8, s->cam[index][2] & 0xff);  in dp8393x_do_load_cam()
278     s->regs[SONIC_CE] = dp8393x_get(s, dp8393x_cdp(s), 0);  in dp8393x_do_load_cam()
296     s->regs[SONIC_CRBA0] = dp8393x_get(s, dp8393x_rrp(s), 0);  in dp8393x_do_read_rra()
359     s->regs[SONIC_WT1] = (val >> 16) & 0xffff;  in dp8393x_update_wt_regs()
360     s->regs[SONIC_WT0] = (val >> 0)  & 0xffff;  in dp8393x_update_wt_regs()
402         tx_len = 0;  in dp8393x_do_transmit_packets()
405         s->regs[SONIC_TCR] = dp8393x_get(s, dp8393x_ttda(s), 1) & 0xf000;  in dp8393x_do_transmit_packets()
419         for (i = 0; i < s->regs[SONIC_TFC]; ) {  in dp8393x_do_transmit_packets()
450             if (tx_len < 0) {  in dp8393x_do_transmit_packets()
470         dp8393x_put(s, dp8393x_ttda(s), 0, s->regs[SONIC_TCR] & 0x0fff);  in dp8393x_do_transmit_packets()
537     uint16_t val = 0;  in dp8393x_read()
551             val = s->cam[s->regs[SONIC_CEP] & 0xf][SONIC_CAP0 - reg];  in dp8393x_read()
588             s->regs[reg] = val & 0xbfff;  in dp8393x_write()
595             s->regs[reg] = val & 0xf017;  in dp8393x_write()
602         s->regs[reg] = val & 0xf000;  in dp8393x_write()
606         s->regs[reg] = val & 0xffe0;  in dp8393x_write()
610         s->regs[reg] = val & 0x7fff;  in dp8393x_write()
628             s->regs[reg] = val & 0xfffc;  in dp8393x_write()
630             s->regs[reg] = val & 0xfffe;  in dp8393x_write()
637         s->regs[reg] = val ^ 0xffff;  in dp8393x_write()
670     s->regs[SONIC_WT1] = 0xffff;  in dp8393x_watchdog()
671     s->regs[SONIC_WT0] = 0xffff;  in dp8393x_watchdog()
689     static const uint8_t bcast[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};  in dp8393x_receive_filter()
693     if ((s->regs[SONIC_RCR] & SONIC_RCR_PRO) && (buf[0] & 1) == 0) {  in dp8393x_receive_filter()
694         return 0;  in dp8393x_receive_filter()
698     if ((s->regs[SONIC_RCR] & SONIC_RCR_AMC) && (buf[0] & 1) == 1) {  in dp8393x_receive_filter()
709     for (i = 0; i < 16; i++) {  in dp8393x_receive_filter()
713                 return 0;  in dp8393x_receive_filter()
754     if (packet_type < 0) {  in dp8393x_receive()
770         dp8393x_put(s, dp8393x_crda(s), 6, 0x0000);  in dp8393x_receive()
782     checksum = cpu_to_le32(crc32(0, buf, pkt_size));  in dp8393x_receive()
805     s->regs[SONIC_CRBA0] = address & 0xffff;  in dp8393x_receive()
809     s->regs[SONIC_RBWC0] = available & 0xffff;  in dp8393x_receive()
819         s->loopback_packet = 0;  in dp8393x_receive()
824     dp8393x_put(s, dp8393x_crda(s), 0, s->regs[SONIC_RCR]); /* status */  in dp8393x_receive()
837         dp8393x_put(s, dp8393x_crda(s), 6, 0x0000);  in dp8393x_receive()
846     s->regs[SONIC_RSC] = (s->regs[SONIC_RSC] & 0xff00) |  in dp8393x_receive()
847                          ((s->regs[SONIC_RSC] + 1) & 0x00ff);  in dp8393x_receive()
869     memset(s->regs, 0, sizeof(s->regs));  in dp8393x_reset()
870     s->regs[SONIC_SR] = 0x0004; /* only revision recognized by Linux/mips */  in dp8393x_reset()
877     s->regs[SONIC_IMR] = 0;  in dp8393x_reset()
878     s->regs[SONIC_ISR] = 0;  in dp8393x_reset()
879     s->regs[SONIC_DCR2] = 0;  in dp8393x_reset()
880     s->regs[SONIC_EOBC] = 0x02F8;  in dp8393x_reset()
881     s->regs[SONIC_RSC] = 0;  in dp8393x_reset()
882     s->regs[SONIC_CE] = 0;  in dp8393x_reset()
883     s->regs[SONIC_RSC] = 0;  in dp8393x_reset()
938     DEFINE_PROP_UINT8("it_shift", dp8393xState, it_shift, 0),