Lines Matching +full:0 +full:x14
42 uint8_t mode; /* 0 .. Mode register, DS-p26 */
60 uint8_t control; /* 0 .. Control register */
75 SJA_MOD = 0x00, /* Mode control register */
76 SJA_CMR = 0x01, /* Command register */
77 SJA_SR = 0x02, /* Status register */
78 SJA_IR = 0x03, /* Interrupt register */
79 SJA_IER = 0x04, /* Interrupt Enable */
80 SJA_BTR0 = 0x06, /* Bus Timing register 0 */
81 SJA_BTR1 = 0x07, /* Bus Timing register 1 */
82 SJA_OCR = 0x08, /* Output Control register */
83 SJA_ALC = 0x0b, /* Arbitration Lost Capture */
84 SJA_ECC = 0x0c, /* Error Code Capture */
85 SJA_EWLR = 0x0d, /* Error Warning Limit */
86 SJA_RXERR = 0x0e, /* RX Error Counter */
87 SJA_TXERR0 = 0x0e, /* TX Error Counter */
88 SJA_TXERR1 = 0x0f,
89 SJA_RMC = 0x1d, /* Rx Message Counter
92 SJA_RBSA = 0x1e, /* Rx Buffer Start Addr
95 SJA_FRM = 0x10, /* Transmit Buffer
100 * ID bytes (11 bits in 0 and 1 for standard message or
101 * 16 bits in 0,1 and 13 bits in 2,3 for extended message)
105 SJA_ID0 = 0x11, /* ID for standard and extended frames */
106 SJA_ID1 = 0x12,
107 SJA_ID2 = 0x13, /* ID cont. for extended frames */
108 SJA_ID3 = 0x14,
110 SJA_DATS = 0x13, /* Data start standard frame */
111 SJA_DATE = 0x15, /* Data start extended frame */
112 SJA_ACR0 = 0x10, /* Acceptance Code (4 bytes) in RESET mode */
113 SJA_AMR0 = 0x14, /* Acceptance Mask (4 bytes) in RESET mode */
115 SJA_CDR = 0x1f /* Clock Divider */
121 SJA_BCAN_CTR = 0x00, /* Control register */
122 SJA_BCAN_CMR = 0x01, /* Command register */
123 SJA_BCAN_SR = 0x02, /* Status register */
124 SJA_BCAN_IR = 0x03 /* Interrupt register */