43     unsigned long rate;      /* Current rate (if .running)              */  member
44     unsigned int divisor;    /* Rate relative to input (if .enabled)    */
45     unsigned int multiplier; /* Rate relative to input (if .enabled)    */
52     .rate   = 12000000,
58     .rate   = 32768,
346     .rate   = 12000000,
354     .rate   = 48000000,
362     .rate   = 12000000,
371     .rate   = 12000000,
379     .rate   = 48000000,
387     .rate   = 6000000,
394     .rate   = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
401     .rate   = 48000000,
410     .rate   = 48000000,
417     .rate   = 12000000,
442     .rate   = 12000000,
457     .rate   = 48000000,
466     .rate   = 48000000,
473     .rate   = 12000000,
633 static void omap_clk_rate_update_full(struct clk *clk, unsigned long int rate,  in omap_clk_rate_update_full()  argument
639     clk->rate = muldiv64(rate, mult, div);  in omap_clk_rate_update_full()
644         omap_clk_rate_update_full(i, rate,  in omap_clk_rate_update_full()
658     omap_clk_rate_update_full(clk, i->rate, div, mult);  in omap_clk_rate_update()
703     return clk->rate;  in omap_clk_getrate()