Lines Matching +full:- +full:p
19 #include "hw/qdev-clock.h"
20 #include "hw/qdev-properties.h"
25 #include "qemu/error-report.h"
71 static uint32_t npcm7xx_pwm_calculate_freq(NPCM7xxPWM *p) in npcm7xx_pwm_calculate_freq() argument
77 if (!p->running) { in npcm7xx_pwm_calculate_freq()
81 csr = NPCM7XX_CSR(p->module->csr, p->index); in npcm7xx_pwm_calculate_freq()
82 ppr = NPCM7XX_PPR(p->module->ppr, p->index); in npcm7xx_pwm_calculate_freq()
83 freq = clock_get_hz(p->module->clock); in npcm7xx_pwm_calculate_freq()
97 return freq / (p->cnr + 1); in npcm7xx_pwm_calculate_freq()
100 static uint32_t npcm7xx_pwm_calculate_duty(NPCM7xxPWM *p) in npcm7xx_pwm_calculate_duty() argument
104 if (p->running) { in npcm7xx_pwm_calculate_duty()
105 if (p->cnr == 0) { in npcm7xx_pwm_calculate_duty()
107 } else if (p->cmr >= p->cnr) { in npcm7xx_pwm_calculate_duty()
110 duty = (uint64_t)NPCM7XX_PWM_MAX_DUTY * (p->cmr + 1) / (p->cnr + 1); in npcm7xx_pwm_calculate_duty()
116 if (p->inverted) { in npcm7xx_pwm_calculate_duty()
117 duty = NPCM7XX_PWM_MAX_DUTY - duty; in npcm7xx_pwm_calculate_duty()
123 static void npcm7xx_pwm_update_freq(NPCM7xxPWM *p) in npcm7xx_pwm_update_freq() argument
125 uint32_t freq = npcm7xx_pwm_calculate_freq(p); in npcm7xx_pwm_update_freq()
127 if (freq != p->freq) { in npcm7xx_pwm_update_freq()
128 trace_npcm7xx_pwm_update_freq(DEVICE(p->module)->canonical_path, in npcm7xx_pwm_update_freq()
129 p->index, p->freq, freq); in npcm7xx_pwm_update_freq()
130 p->freq = freq; in npcm7xx_pwm_update_freq()
134 static void npcm7xx_pwm_update_duty(NPCM7xxPWM *p) in npcm7xx_pwm_update_duty() argument
136 uint32_t duty = npcm7xx_pwm_calculate_duty(p); in npcm7xx_pwm_update_duty()
138 if (duty != p->duty) { in npcm7xx_pwm_update_duty()
139 trace_npcm7xx_pwm_update_duty(DEVICE(p->module)->canonical_path, in npcm7xx_pwm_update_duty()
140 p->index, p->duty, duty); in npcm7xx_pwm_update_duty()
141 p->duty = duty; in npcm7xx_pwm_update_duty()
142 qemu_set_irq(p->module->duty_gpio_out[p->index], p->duty); in npcm7xx_pwm_update_duty()
146 static void npcm7xx_pwm_update_output(NPCM7xxPWM *p) in npcm7xx_pwm_update_output() argument
148 npcm7xx_pwm_update_freq(p); in npcm7xx_pwm_update_output()
149 npcm7xx_pwm_update_duty(p); in npcm7xx_pwm_update_output()
155 uint32_t old_ppr = s->ppr; in npcm7xx_pwm_write_ppr()
158 s->ppr = new_ppr; in npcm7xx_pwm_write_ppr()
161 npcm7xx_pwm_update_freq(&s->pwm[i]); in npcm7xx_pwm_write_ppr()
169 uint32_t old_csr = s->csr; in npcm7xx_pwm_write_csr()
172 s->csr = new_csr; in npcm7xx_pwm_write_csr()
175 npcm7xx_pwm_update_freq(&s->pwm[i]); in npcm7xx_pwm_write_csr()
185 NPCM7xxPWM *p; in npcm7xx_pwm_write_pcr() local
187 s->pcr = new_pcr; in npcm7xx_pwm_write_pcr()
190 p = &s->pwm[i]; in npcm7xx_pwm_write_pcr()
195 * We only run a PWM channel with toggle mode. Single-shot mode does not in npcm7xx_pwm_write_pcr()
196 * generate frequency and duty-cycle values. in npcm7xx_pwm_write_pcr()
199 if (p->running) { in npcm7xx_pwm_write_pcr()
200 /* Re-run this PWM channel if inverted changed. */ in npcm7xx_pwm_write_pcr()
201 if (p->inverted ^ inverted) { in npcm7xx_pwm_write_pcr()
202 p->inverted = inverted; in npcm7xx_pwm_write_pcr()
203 npcm7xx_pwm_update_duty(p); in npcm7xx_pwm_write_pcr()
207 p->running = true; in npcm7xx_pwm_write_pcr()
208 p->inverted = inverted; in npcm7xx_pwm_write_pcr()
209 npcm7xx_pwm_update_output(p); in npcm7xx_pwm_write_pcr()
213 p->running = false; in npcm7xx_pwm_write_pcr()
214 p->inverted = inverted; in npcm7xx_pwm_write_pcr()
215 npcm7xx_pwm_update_output(p); in npcm7xx_pwm_write_pcr()
295 value = s->pwm[npcm7xx_cnr_index(offset)].cnr; in npcm7xx_pwm_read()
302 value = s->pwm[npcm7xx_cmr_index(offset)].cmr; in npcm7xx_pwm_read()
309 value = s->pwm[npcm7xx_pdr_index(offset)].pdr; in npcm7xx_pwm_read()
316 value = s->pwm[npcm7xx_pwdr_index(offset)].pwdr; in npcm7xx_pwm_read()
320 value = s->ppr; in npcm7xx_pwm_read()
324 value = s->csr; in npcm7xx_pwm_read()
328 value = s->pcr; in npcm7xx_pwm_read()
332 value = s->pier; in npcm7xx_pwm_read()
336 value = s->piir; in npcm7xx_pwm_read()
346 trace_npcm7xx_pwm_read(DEVICE(s)->canonical_path, offset, value); in npcm7xx_pwm_read()
354 NPCM7xxPWM *p; in npcm7xx_pwm_write() local
357 trace_npcm7xx_pwm_write(DEVICE(s)->canonical_path, offset, value); in npcm7xx_pwm_write()
363 p = &s->pwm[npcm7xx_cnr_index(offset)]; in npcm7xx_pwm_write()
367 p->cnr = NPCM7XX_MAX_CNR; in npcm7xx_pwm_write()
369 p->cnr = value; in npcm7xx_pwm_write()
371 npcm7xx_pwm_update_output(p); in npcm7xx_pwm_write()
378 p = &s->pwm[npcm7xx_cmr_index(offset)]; in npcm7xx_pwm_write()
382 p->cmr = NPCM7XX_MAX_CMR; in npcm7xx_pwm_write()
384 p->cmr = value; in npcm7xx_pwm_write()
386 npcm7xx_pwm_update_output(p); in npcm7xx_pwm_write()
394 "%s: register @ 0x%04" HWADDR_PRIx " is read-only\n", in npcm7xx_pwm_write()
456 NPCM7xxPWM *p = &s->pwm[i]; in npcm7xx_pwm_enter_reset() local
458 p->cnr = 0x00000000; in npcm7xx_pwm_enter_reset()
459 p->cmr = 0x00000000; in npcm7xx_pwm_enter_reset()
460 p->pdr = 0x00000000; in npcm7xx_pwm_enter_reset()
461 p->pwdr = 0x00000000; in npcm7xx_pwm_enter_reset()
464 s->ppr = 0x00000000; in npcm7xx_pwm_enter_reset()
465 s->csr = 0x00000000; in npcm7xx_pwm_enter_reset()
466 s->pcr = 0x00000000; in npcm7xx_pwm_enter_reset()
467 s->pier = 0x00000000; in npcm7xx_pwm_enter_reset()
468 s->piir = 0x00000000; in npcm7xx_pwm_enter_reset()
477 qemu_irq_lower(s->pwm[i].irq); in npcm7xx_pwm_hold_reset()
487 QEMU_BUILD_BUG_ON(ARRAY_SIZE(s->pwm) != NPCM7XX_PWM_PER_MODULE); in npcm7xx_pwm_init()
489 NPCM7xxPWM *p = &s->pwm[i]; in npcm7xx_pwm_init() local
490 p->module = s; in npcm7xx_pwm_init()
491 p->index = i; in npcm7xx_pwm_init()
492 sysbus_init_irq(sbd, &p->irq); in npcm7xx_pwm_init()
495 memory_region_init_io(&s->iomem, obj, &npcm7xx_pwm_ops, s, in npcm7xx_pwm_init()
497 sysbus_init_mmio(sbd, &s->iomem); in npcm7xx_pwm_init()
498 s->clock = qdev_init_clock_in(DEVICE(s), "clock", NULL, NULL, 0); in npcm7xx_pwm_init()
502 &s->pwm[i].freq, OBJ_PROP_FLAG_READ); in npcm7xx_pwm_init()
504 &s->pwm[i].duty, OBJ_PROP_FLAG_READ); in npcm7xx_pwm_init()
506 qdev_init_gpio_out_named(DEVICE(s), s->duty_gpio_out, in npcm7xx_pwm_init()
507 "duty-gpio-out", NPCM7XX_PWM_PER_MODULE); in npcm7xx_pwm_init()
511 .name = "npcm7xx-pwm",
529 .name = "npcm7xx-pwm-module",
551 dc->desc = "NPCM7xx PWM Controller"; in npcm7xx_pwm_class_init()
552 dc->vmsd = &vmstate_npcm7xx_pwm_module; in npcm7xx_pwm_class_init()
553 rc->phases.enter = npcm7xx_pwm_enter_reset; in npcm7xx_pwm_class_init()
554 rc->phases.hold = npcm7xx_pwm_hold_reset; in npcm7xx_pwm_class_init()