293         ch->regs[DBDMA_STATUS] &= ~FLUSH;  in dbdma_end()
382     ch->regs[DBDMA_STATUS] &= ~FLUSH;  in load_word()
415     ch->regs[DBDMA_STATUS] &= ~FLUSH;  in store_word()
566                             DBDMA_rw rw, DBDMA_flush flush,  in DBDMA_register_channel()  argument
575     assert(flush);  in DBDMA_register_channel()
579     ch->flush = flush;  in DBDMA_register_channel()
598      * FLUSH and WAKE are set by SW and cleared by HW  in dbdma_control_write()
644     /* FLUSH is its own thing */  in dbdma_control_write()
645     if ((mask & FLUSH) && (value & FLUSH))  {  in dbdma_control_write()
646         DBDMA_DPRINTFCH(ch, " Setting FLUSH !\n");  in dbdma_control_write()
647         /* We set flush directly in the status register, we do *NOT*  in dbdma_control_write()
650          * will be set only during the HW flush operation so it is  in dbdma_control_write()
653         ch->regs[DBDMA_STATUS] |= FLUSH;  in dbdma_control_write()
683     /* If we need to flush the underlying HW, do it now, this happens  in dbdma_control_write()
684      * both on FLUSH commands and when stopping the channel for safety.  in dbdma_control_write()
686     if (do_flush && ch->flush) {  in dbdma_control_write()
687         ch->flush(&ch->io);  in dbdma_control_write()
904         ch->flush = dbdma_unassigned_flush;  in mac_dbdma_init()