Lines Matching +full:cmd +full:- +full:cnt +full:- +full:name
4 * Copyright (c) 2012-2015 Jiri Slaby
32 #include "qemu/main-loop.h" /* iothread mutex */
65 #define EDU_DMA_DIR(cmd) (((cmd) & 0x2) >> 1) argument
72 dma_addr_t cnt; member
73 dma_addr_t cmd; member
82 return msi_enabled(&edu->pdev); in edu_msi_enabled()
87 edu->irq_status |= val; in edu_raise_irq()
88 if (edu->irq_status) { in edu_raise_irq()
90 msi_notify(&edu->pdev, 0); in edu_raise_irq()
92 pci_set_irq(&edu->pdev, 1); in edu_raise_irq()
99 edu->irq_status &= ~val; in edu_lower_irq()
101 if (!edu->irq_status && !edu_msi_enabled(edu)) { in edu_lower_irq()
102 pci_set_irq(&edu->pdev, 0); in edu_lower_irq()
122 "EDU: DMA range 0x%016"PRIx64"-0x%016"PRIx64 in edu_check_range()
123 " out of bounds (0x%016"PRIx64"-0x%016"PRIx64")!", in edu_check_range()
124 xfer_start, xfer_end - 1, dma_start, dma_end - 1); in edu_check_range()
129 dma_addr_t res = addr & edu->dma_mask; in edu_clamp_addr()
145 if (!(edu->dma.cmd & EDU_DMA_RUN)) { in edu_dma_timer()
149 if (EDU_DMA_DIR(edu->dma.cmd) == EDU_DMA_FROM_PCI) { in edu_dma_timer()
150 uint64_t dst = edu->dma.dst; in edu_dma_timer()
151 edu_check_range(dst, edu->dma.cnt, DMA_START, DMA_SIZE); in edu_dma_timer()
152 dst -= DMA_START; in edu_dma_timer()
153 pci_dma_read(&edu->pdev, edu_clamp_addr(edu, edu->dma.src), in edu_dma_timer()
154 edu->dma_buf + dst, edu->dma.cnt); in edu_dma_timer()
156 uint64_t src = edu->dma.src; in edu_dma_timer()
157 edu_check_range(src, edu->dma.cnt, DMA_START, DMA_SIZE); in edu_dma_timer()
158 src -= DMA_START; in edu_dma_timer()
159 pci_dma_write(&edu->pdev, edu_clamp_addr(edu, edu->dma.dst), in edu_dma_timer()
160 edu->dma_buf + src, edu->dma.cnt); in edu_dma_timer()
163 edu->dma.cmd &= ~EDU_DMA_RUN; in edu_dma_timer()
164 if (edu->dma.cmd & EDU_DMA_IRQ) { in edu_dma_timer()
176 if (write && (edu->dma.cmd & EDU_DMA_RUN)) { in dma_rw()
187 timer_mod(&edu->dma_timer, qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL) + 100); in dma_rw()
209 val = edu->addr4; in edu_mmio_read()
212 qemu_mutex_lock(&edu->thr_mutex); in edu_mmio_read()
213 val = edu->fact; in edu_mmio_read()
214 qemu_mutex_unlock(&edu->thr_mutex); in edu_mmio_read()
217 val = qatomic_read(&edu->status); in edu_mmio_read()
220 val = edu->irq_status; in edu_mmio_read()
223 dma_rw(edu, false, &val, &edu->dma.src, false); in edu_mmio_read()
226 dma_rw(edu, false, &val, &edu->dma.dst, false); in edu_mmio_read()
229 dma_rw(edu, false, &val, &edu->dma.cnt, false); in edu_mmio_read()
232 dma_rw(edu, false, &val, &edu->dma.cmd, false); in edu_mmio_read()
254 edu->addr4 = ~val; in edu_mmio_write()
257 if (qatomic_read(&edu->status) & EDU_STATUS_COMPUTING) { in edu_mmio_write()
260 /* EDU_STATUS_COMPUTING cannot go 0->1 concurrently, because it is only in edu_mmio_write()
263 qemu_mutex_lock(&edu->thr_mutex); in edu_mmio_write()
264 edu->fact = val; in edu_mmio_write()
265 qatomic_or(&edu->status, EDU_STATUS_COMPUTING); in edu_mmio_write()
266 qemu_cond_signal(&edu->thr_cond); in edu_mmio_write()
267 qemu_mutex_unlock(&edu->thr_mutex); in edu_mmio_write()
271 qatomic_or(&edu->status, EDU_STATUS_IRQFACT); in edu_mmio_write()
275 qatomic_and(&edu->status, ~EDU_STATUS_IRQFACT); in edu_mmio_write()
285 dma_rw(edu, true, &val, &edu->dma.src, false); in edu_mmio_write()
288 dma_rw(edu, true, &val, &edu->dma.dst, false); in edu_mmio_write()
291 dma_rw(edu, true, &val, &edu->dma.cnt, false); in edu_mmio_write()
297 dma_rw(edu, true, &val, &edu->dma.cmd, true); in edu_mmio_write()
328 qemu_mutex_lock(&edu->thr_mutex); in edu_fact_thread()
329 while ((qatomic_read(&edu->status) & EDU_STATUS_COMPUTING) == 0 && in edu_fact_thread()
330 !edu->stopping) { in edu_fact_thread()
331 qemu_cond_wait(&edu->thr_cond, &edu->thr_mutex); in edu_fact_thread()
334 if (edu->stopping) { in edu_fact_thread()
335 qemu_mutex_unlock(&edu->thr_mutex); in edu_fact_thread()
339 val = edu->fact; in edu_fact_thread()
340 qemu_mutex_unlock(&edu->thr_mutex); in edu_fact_thread()
343 ret *= val--; in edu_fact_thread()
351 qemu_mutex_lock(&edu->thr_mutex); in edu_fact_thread()
352 edu->fact = ret; in edu_fact_thread()
353 qemu_mutex_unlock(&edu->thr_mutex); in edu_fact_thread()
354 qatomic_and(&edu->status, ~EDU_STATUS_COMPUTING); in edu_fact_thread()
359 if (qatomic_read(&edu->status) & EDU_STATUS_IRQFACT) { in edu_fact_thread()
372 uint8_t *pci_conf = pdev->config; in pci_edu_realize()
380 timer_init_ms(&edu->dma_timer, QEMU_CLOCK_VIRTUAL, edu_dma_timer, edu); in pci_edu_realize()
382 qemu_mutex_init(&edu->thr_mutex); in pci_edu_realize()
383 qemu_cond_init(&edu->thr_cond); in pci_edu_realize()
384 qemu_thread_create(&edu->thread, "edu", edu_fact_thread, in pci_edu_realize()
387 memory_region_init_io(&edu->mmio, OBJECT(edu), &edu_mmio_ops, edu, in pci_edu_realize()
388 "edu-mmio", 1 * MiB); in pci_edu_realize()
389 pci_register_bar(pdev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &edu->mmio); in pci_edu_realize()
396 qemu_mutex_lock(&edu->thr_mutex); in pci_edu_uninit()
397 edu->stopping = true; in pci_edu_uninit()
398 qemu_mutex_unlock(&edu->thr_mutex); in pci_edu_uninit()
399 qemu_cond_signal(&edu->thr_cond); in pci_edu_uninit()
400 qemu_thread_join(&edu->thread); in pci_edu_uninit()
402 qemu_cond_destroy(&edu->thr_cond); in pci_edu_uninit()
403 qemu_mutex_destroy(&edu->thr_mutex); in pci_edu_uninit()
405 timer_del(&edu->dma_timer); in pci_edu_uninit()
413 edu->dma_mask = (1UL << 28) - 1; in edu_instance_init()
415 &edu->dma_mask, OBJ_PROP_FLAG_READWRITE); in edu_instance_init()
423 k->realize = pci_edu_realize; in edu_class_init()
424 k->exit = pci_edu_uninit; in edu_class_init()
425 k->vendor_id = PCI_VENDOR_ID_QEMU; in edu_class_init()
426 k->device_id = 0x11e8; in edu_class_init()
427 k->revision = 0x10; in edu_class_init()
428 k->class_id = PCI_CLASS_OTHERS; in edu_class_init()
429 set_bit(DEVICE_CATEGORY_MISC, dc->categories); in edu_class_init()
434 .name = TYPE_PCI_EDU_DEVICE,