43 #define NR_REGS                            (0xff)
62 #define AXP209_CHIP_VERSION_ID             (0x01)
63 #define AXP209_DC_DC2_OUT_V_CTRL_RESET     (0x16)
68     memset(s->regs, 0, NR_REGS);  in axp209_reset_enter()
69     s->ptr = 0;  in axp209_reset_enter()
70     s->count = 0;  in axp209_reset_enter()
72     s->regs[0x03] = AXP209_CHIP_VERSION_ID;  in axp209_reset_enter()
73     s->regs[0x23] = AXP209_DC_DC2_OUT_V_CTRL_RESET;  in axp209_reset_enter()
75     s->regs[0x30] = 0x60;  in axp209_reset_enter()
76     s->regs[0x32] = 0x46;  in axp209_reset_enter()
77     s->regs[0x34] = 0x41;  in axp209_reset_enter()
78     s->regs[0x35] = 0x22;  in axp209_reset_enter()
79     s->regs[0x36] = 0x5d;  in axp209_reset_enter()
80     s->regs[0x37] = 0x08;  in axp209_reset_enter()
81     s->regs[0x38] = 0xa5;  in axp209_reset_enter()
82     s->regs[0x39] = 0x1f;  in axp209_reset_enter()
83     s->regs[0x3a] = 0x68;  in axp209_reset_enter()
84     s->regs[0x3b] = 0x5f;  in axp209_reset_enter()
85     s->regs[0x3c] = 0xfc;  in axp209_reset_enter()
86     s->regs[0x3d] = 0x16;  in axp209_reset_enter()
87     s->regs[0x40] = 0xd8;  in axp209_reset_enter()
88     s->regs[0x42] = 0xff;  in axp209_reset_enter()
89     s->regs[0x43] = 0x3b;  in axp209_reset_enter()
90     s->regs[0x80] = 0xe0;  in axp209_reset_enter()
91     s->regs[0x82] = 0x83;  in axp209_reset_enter()
92     s->regs[0x83] = 0x80;  in axp209_reset_enter()
93     s->regs[0x84] = 0x32;  in axp209_reset_enter()
94     s->regs[0x86] = 0xff;  in axp209_reset_enter()
95     s->regs[0x90] = 0x07;  in axp209_reset_enter()
96     s->regs[0x91] = 0xa0;  in axp209_reset_enter()
97     s->regs[0x92] = 0x07;  in axp209_reset_enter()
98     s->regs[0x93] = 0x07;  in axp209_reset_enter()
111     memset(s->regs, 0, NR_REGS);  in axp221_reset_enter()
112     s->ptr = 0;  in axp221_reset_enter()
113     s->count = 0;  in axp221_reset_enter()
116     s->regs[0x00] = AXP221_PWR_STATUS_ACIN_PRESENT  in axp221_reset_enter()
120     s->regs[0x01] = 0x00; /* no battery is connected */  in axp221_reset_enter()
124      * u-boot spl. I had read it from AXP221s and got 0x06 value.  in axp221_reset_enter()
127     s->regs[0x03] = 0x06;  in axp221_reset_enter()
129     s->regs[0x10] = 0xbf;  in axp221_reset_enter()
130     s->regs[0x13] = 0x01;  in axp221_reset_enter()
131     s->regs[0x30] = 0x60;  in axp221_reset_enter()
132     s->regs[0x31] = 0x03;  in axp221_reset_enter()
133     s->regs[0x32] = 0x43;  in axp221_reset_enter()
134     s->regs[0x33] = 0xc6;  in axp221_reset_enter()
135     s->regs[0x34] = 0x45;  in axp221_reset_enter()
136     s->regs[0x35] = 0x0e;  in axp221_reset_enter()
137     s->regs[0x36] = 0x5d;  in axp221_reset_enter()
138     s->regs[0x37] = 0x08;  in axp221_reset_enter()
139     s->regs[0x38] = 0xa5;  in axp221_reset_enter()
140     s->regs[0x39] = 0x1f;  in axp221_reset_enter()
141     s->regs[0x3c] = 0xfc;  in axp221_reset_enter()
142     s->regs[0x3d] = 0x16;  in axp221_reset_enter()
143     s->regs[0x80] = 0x80;  in axp221_reset_enter()
144     s->regs[0x82] = 0xe0;  in axp221_reset_enter()
145     s->regs[0x84] = 0x32;  in axp221_reset_enter()
146     s->regs[0x8f] = 0x01;  in axp221_reset_enter()
148     s->regs[0x90] = 0x07;  in axp221_reset_enter()
149     s->regs[0x91] = 0x1f;  in axp221_reset_enter()
150     s->regs[0x92] = 0x07;  in axp221_reset_enter()
151     s->regs[0x93] = 0x1f;  in axp221_reset_enter()
153     s->regs[0x40] = 0xd8;  in axp221_reset_enter()
154     s->regs[0x41] = 0xff;  in axp221_reset_enter()
155     s->regs[0x42] = 0x03;  in axp221_reset_enter()
156     s->regs[0x43] = 0x03;  in axp221_reset_enter()
158     s->regs[0xb8] = 0xc0;  in axp221_reset_enter()
159     s->regs[0xb9] = 0x64;  in axp221_reset_enter()
160     s->regs[0xe6] = 0xa0;  in axp221_reset_enter()
176     s->count = 0;  in axp2xx_event()
178     return 0;  in axp2xx_event()
185     uint8_t ret = 0xff;  in axp2xx_rx()
198  * Update ptr with byte 0, then perform write with second byte.
204     if (s->count == 0) {  in axp2xx_tx()
214     return 0;  in axp2xx_tx()