hw/misc/allwinner-h3-ccu.c

30     REG_PLL_CPUX             = 0x0000, /* PLL CPUX Control */
31     REG_PLL_AUDIO            = 0x0008, /* PLL Audio Control */
32     REG_PLL_VIDEO            = 0x0010, /* PLL Video Control */
33     REG_PLL_VE               = 0x0018, /* PLL VE Control */
34     REG_PLL_DDR              = 0x0020, /* PLL DDR Control */
35     REG_PLL_PERIPH0          = 0x0028, /* PLL Peripherals 0 Control */
36     REG_PLL_GPU              = 0x0038, /* PLL GPU Control */
37     REG_PLL_PERIPH1          = 0x0044, /* PLL Peripherals 1 Control */
38     REG_PLL_DE               = 0x0048, /* PLL Display Engine Control */
44     REG_PLL_TIME0            = 0x0200, /* PLL Stable Time 0 */
45     REG_PLL_TIME1            = 0x0204, /* PLL Stable Time 1 */
46     REG_PLL_CPUX_BIAS        = 0x0220, /* PLL CPUX Bias */
47     REG_PLL_AUDIO_BIAS       = 0x0224, /* PLL Audio Bias */
48     REG_PLL_VIDEO_BIAS       = 0x0228, /* PLL Video Bias */
49     REG_PLL_VE_BIAS          = 0x022C, /* PLL VE Bias */
50     REG_PLL_DDR_BIAS         = 0x0230, /* PLL DDR Bias */
51     REG_PLL_PERIPH0_BIAS     = 0x0234, /* PLL Peripherals 0 Bias */
52     REG_PLL_GPU_BIAS         = 0x023C, /* PLL GPU Bias */
53     REG_PLL_PERIPH1_BIAS     = 0x0244, /* PLL Peripherals 1 Bias */
54     REG_PLL_DE_BIAS          = 0x0248, /* PLL Display Engine Bias */
55     REG_PLL_CPUX_TUNING      = 0x0250, /* PLL CPUX Tuning */
56     REG_PLL_DDR_TUNING       = 0x0260, /* PLL DDR Tuning */
129     case REG_PLL_CPUX:    /* PLL CPUX Control */  in allwinner_h3_ccu_write()
130     case REG_PLL_AUDIO:   /* PLL Audio Control */  in allwinner_h3_ccu_write()
131     case REG_PLL_VIDEO:   /* PLL Video Control */  in allwinner_h3_ccu_write()
132     case REG_PLL_VE:      /* PLL VE Control */  in allwinner_h3_ccu_write()
133     case REG_PLL_DDR:     /* PLL DDR Control */  in allwinner_h3_ccu_write()
134     case REG_PLL_PERIPH0: /* PLL Peripherals 0 Control */  in allwinner_h3_ccu_write()
135     case REG_PLL_GPU:     /* PLL GPU Control */  in allwinner_h3_ccu_write()
136     case REG_PLL_PERIPH1: /* PLL Peripherals 1 Control */  in allwinner_h3_ccu_write()
137     case REG_PLL_DE:      /* PLL Display Engine Control */  in allwinner_h3_ccu_write()