Lines Matching full:control

2  * Allwinner H3 Clock Control Unit emulation
30     REG_PLL_CPUX             = 0x0000, /* PLL CPUX Control */
31     REG_PLL_AUDIO            = 0x0008, /* PLL Audio Control */
32     REG_PLL_VIDEO            = 0x0010, /* PLL Video Control */
33     REG_PLL_VE               = 0x0018, /* PLL VE Control */
34     REG_PLL_DDR              = 0x0020, /* PLL DDR Control */
35     REG_PLL_PERIPH0          = 0x0028, /* PLL Peripherals 0 Control */
36     REG_PLL_GPU              = 0x0038, /* PLL GPU Control */
37     REG_PLL_PERIPH1          = 0x0044, /* PLL Peripherals 1 Control */
38     REG_PLL_DE               = 0x0048, /* PLL Display Engine Control */
129     case REG_PLL_CPUX:    /* PLL CPUX Control */  in allwinner_h3_ccu_write()
130     case REG_PLL_AUDIO:   /* PLL Audio Control */  in allwinner_h3_ccu_write()
131     case REG_PLL_VIDEO:   /* PLL Video Control */  in allwinner_h3_ccu_write()
132     case REG_PLL_VE:      /* PLL VE Control */  in allwinner_h3_ccu_write()
133     case REG_PLL_DDR:     /* PLL DDR Control */  in allwinner_h3_ccu_write()
134     case REG_PLL_PERIPH0: /* PLL Peripherals 0 Control */  in allwinner_h3_ccu_write()
135     case REG_PLL_GPU:     /* PLL GPU Control */  in allwinner_h3_ccu_write()
136     case REG_PLL_PERIPH1: /* PLL Peripherals 1 Control */  in allwinner_h3_ccu_write()
137     case REG_PLL_DE:      /* PLL Display Engine Control */  in allwinner_h3_ccu_write()